Datasheet ADIS16209 (Analog Devices) - 8

Data Sheet ADIS16209 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ADC EF ND DD G VR AUX V 16 15 14 13 AY SCLK 1 12 AUX DAC AX PIN 1 INDICATOR DOUT 2 11 DNC ADIS16209 TOP LOOK THROUGH DIN 3 VIEW 10 DNC (Not to Scale) CS 4 9 RST 5 6 7 8 IO1 IO2 D D DNC DNC NOTES 1. DNC = DO NOT CONNECT TO THIS PIN. 2. THIS IS NOT AN ACTUAL TOP VIEW, BECAUSE THE PINS ARE NOT VISIBLE FROM THE TOP. THIS IS
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A LAYOUT VIEW THAT REPRESENTS THE PIN CONFIGURATION IF THE PACKAGE IS LOOKED THROUGH FROM THE TOP. THIS CONFIGURATION IS PROVIDED FOR PCB LAYOUT PURPOSES.
07096- Figure 5. Pin Configuration
Table 5. Pin Function Descriptions Pin No. Mnemonic Type1 Description
1 SCLK I SPI, Serial Clock. 2 DOUT O SPI, Data Output. 3 DIN I SPI, Data Input. 4 CS I SPI, Chip Select. 5, 6 DIO1, DIO2 I/O Digital Input/Output Pins. 7, 8, 10, 11 DNC N/A Do not connect to this pin. 9 RST I Reset, Active Low. 12 AUX DAC O Auxiliary DAC Output. 13 VDD S Power Supply, 3.3 V. 14 AUX ADC I Auxiliary ADC Input. 15 VREF O Precision Reference. 16 GND S Ground. 1 S = supply; O = output; I = input.
RECOMMENDED PAD GEOMETRY 4.1865 8× 2.6955 8× 0.670 12× 8.373 5.391 2× 4× 0.500 16× 1.127 16×
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9.2mm × 9.2mm STACKED LGA PACKAGE
07096- Figure 6. Example of a Pad Layout Rev. F | Page 7 of 21 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS RECOMMENDED PAD GEOMETRY TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BASIC OPERATION OUTPUT DATA REGISTERS Accelerometers Horizontal Incline Angle Vertical Incline Angle Internal Temperature Power Supply Auxiliary ADC OPERATION CONTROL REGISTERS Internal Sample Rate Power Management Digital Filtering Digital I/O Lines Data-Ready I/O Indicator Self-Test General-Purpose I/O Auxiliary DAC Global Commands CALIBRATION REGISTERS ALARM REGISTERS Status APPLICATIONS INFORMATION POWER SUPPLY CONSIDERATIONS Power-On-Reset Function Transient Current from VDD Ramp Rate Filter Settling ASSEMBLY INTERFACE BOARD OUTLINE DIMENSIONS ORDERING GUIDE