Datasheet ADIS16228 (Analog Devices) - 9

HerstellerAnalog Devices
BeschreibungDigital Triaxial Vibration Sensor with FFT Analysis and Storage
Seiten / Seite29 / 9 — ADIS16228. Data Sheet. THEORY OF OPERATION. CAPTURE. SPI. TRIAXIAL. …
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ADIS16228. Data Sheet. THEORY OF OPERATION. CAPTURE. SPI. TRIAXIAL. BUFFER. SIGNALS. MEMS. OUTPUT. SENSOR. REGISTERS. SCLK. TEMP. ADC. DIN. I PO

ADIS16228 Data Sheet THEORY OF OPERATION CAPTURE SPI TRIAXIAL BUFFER SIGNALS MEMS OUTPUT SENSOR REGISTERS SCLK TEMP ADC DIN I PO

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ADIS16228 Data Sheet THEORY OF OPERATION
The ADIS16228 is a vibration sensing system that combines a
CAPTURE SPI
triaxial MEMS accelerometer with advanced signal processing.
TRIAXIAL BUFFER SIGNALS MEMS OUTPUT
The SPI-compatible port and user register structure provide
SENSOR REGISTERS CS
convenient access to frequency domain vibration data and many
SCLK T
user controls.
TEMP R ADC DIN SENSOR I PO SENSING ELEMENT CONTROLLER CONTROL SP DOUT REGISTERS
Digital vibration sensing in the ADIS16228 starts with a MEMS accelerometer core on each axis. Accelerometers translate linear
CLOCK
006 changes in velocity into a representative electrical signal, using 10069- a micromechanical system like the one shown in Figure 5. The Figure 6. Simplified Sensor Signal Processing Block Diagram mechanical part of this system includes two different frames
USER INTERFACE
(one fixed, one moving) that have a series of plates to form
SPI Interface
a variable, differential capacitive network. When experiencing the force associated with gravity or acceleration, the moving The user registers (which include both the output registers and frame changes its physical position with respect to the fixed the control registers, as shown in Figure 6) manage user access frame, which results in a change in capacitance. Tiny springs to both sensor data and configuration inputs. Each 16-bit register tether the moving frame to the fixed frame and govern the has its own unique bit assignment and two addresses: one for its relationship between acceleration and physical displacement. upper byte and one for its lower byte. Table 8 provides a memory A modulation signal on the moving plate feeds through each map for each register, along with its function and lower byte capacitive path into the fixed frame plates and into a demodulation address. The data collection and configuration command uses circuit, which produces the electrical signal that is proportional the SPI, which consists of four wires. The chip select (CS) signal to the acceleration acting on the device. activates the SPI interface, and the serial clock (SCLK) synchronizes the serial data lines. Input commands clock into
ANCHOR
the DIN pin, one bit at a time, on the SCLK rising edge. Output data clocks out of the DOUT pin on the SCLK falling edge.
PLATE MOVABLE CAPACITORS FRAME
When the SPI is used as a slave device, the DOUT contents reflect the information requested using a DIN command.
FIXED N Dual-Memory Structure O PLATES TI A
The user registers provide addressing for all input/output operations
R E UNIT SENSING L
in the SPI interface. The control registers use a dual-memory
E CELL UNIT
structure. The controller uses SRAM registers for normal
ACC FORCING MOVING CELL PLATE
operation, including user-configuration commands. The flash memory provides nonvolatile storage for control registers that have flash backup (see Table 8). Storing configuration data in the flash memory requires a manual flash update command 005 69- (GLOB_CMD[6] = 1, DIN = 0xBE40). When the device powers
ANCHOR
100 on or resets, the flash memory contents load into the SRAM, and Figure 5. MEMS Sensor Diagram the device starts producing data according to the configuration
SIGNAL PROCESSING
in the control registers. Figure 6 offers a simplified block diagram for the ADIS16228.
MANUAL
The signal processing stage includes time domain data capture,
FLASH BACKUP
digital decimation/filtering, windowing, FFT analysis, FFT
NONVOLATILE VOLATILE
averaging, and record storage. See Figure 14 for more details
FLASH MEMORY SRAM (NO SPI ACCESS) SPI ACCESS
on the signal processing operation.
START-UP RESET
007 69- 100 Figure 7. SRAM and Flash Memory Diagram Rev. E | Page 8 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS THEORY OF OPERATION SENSING ELEMENT SIGNAL PROCESSING USER INTERFACE SPI Interface Dual-Memory Structure BASIC OPERATION SPI WRITE COMMANDS SPI READ COMMANDS DATA RECORDING AND SIGNAL PROCESSING RECORDING MODE Manual FFT Mode Automatic FFT Mode Manual Time Capture Mode Real-Time Mode SPECTRAL RECORD PRODUCTION SAMPLE RATE/FILTERING DYNAMIC RANGE/SENSITIVITY Frequency Response Correction Axial Definitions Dynamic Range Settings Scale Adjustment PRE-FFT WINDOWING FFT FFT Averaging RECORDING TIMES DATA RECORDS FFT RECORD FLASH ENDURANCE SPECTRAL ALARMS ALARM DEFINITION Alarm Band Frequency Definitions Alarm Trigger Settings Enable Alarm Settings ALARM INDICATOR SIGNALS ALARM FLAGS AND CONDITIONS ALARM STATUS WORST-CASE CONDITION MONITORING READING OUTPUT DATA READING DATA FROM THE DATA BUFFER ACCESSING FFT RECORD DATA DATA FORMAT REAL-TIME DATA COLLECTION POWER SUPPLY/TEMPERATURE FFT EVENT HEADER SYSTEM TOOLS GLOBAL COMMANDS STATUS/ERROR FLAGS POWER-DOWN OPERATION MANAGMENT Software Busy Indicator Software Escape Code INPUT/OUTPUT FUNCTIONS Busy Indicator Trigger Input Alarm Indicator General-Purpose Input/Output SELF-TEST FLASH MEMORY MANAGEMENT DEVICE IDENTIFICATION APPLICATIONS INFORMATION INTERFACE BOARD FLEX CONNECTOR CARE MATING CONNECTOR OUTLINE DIMENSIONS ORDERING GUIDE