Datasheet ADXL343 (Analog Devices) - 9

ADXL343 Data Sheet 55 280 50 275 ) 45 % 270 ( 40 ) 265 TION /g A 35 L SB 260 PU 30 (L Y T 255 PO F 25 IVI T O T SI 250 20 EN C SEN 245 15 PER 10 240 5 235 0 230 230 234 238 242 246 250 254 258 262 266 270 274 278 282
218
–40 –20 0 20 40 60 80 100 120
222
SENSITIVITY (LSB/g ) TEMPERATURE (°C)
10627- 10627- Figure 10. Sensitivity at 25°C, VS = 2.5 V, Full Resolution, All Axes Figure 13. X-Axis Sensitivity vs. Temperature— Eight Parts Soldered to PCB, VS = 2.5 V, Ful Resolution
40 280 275 35 ) % 270 ( 30 ) 265 TION /g A 25 L SB 260 PU (L Y 20 T 255 PO F IVI T O SI 250 T 15 EN C SEN 245 10 PER 240 5 235 0 230 –0.02 –0.01 0 0.01 0.02
219
–40 –20 0 20 40 60 80 100 120
223
SENSITIVITY TEMPERATURE COEFFICIENT (%/°C)
10627-
TEMPERATURE (°C)
10627- Figure 11. Sensitivity Temperature Coefficient, VS = 2.5 V, All Axes Figure 14. Y-Axis Sensitivity vs. Temperature— Eight Parts Soldered to PCB, VS = 2.5 V, Full Resolution
25 280 275 ) 20 % 270 ( ) 265 TION /g A L 15 SB 260 PU (L Y PO T 255 F IVI O 10 T T SI 250 EN C SEN 245 5 PER 240 235 0 230 100 110 120 130 140 150 160 170 180 190 200
231
–40 –20 0 20 40 60 80 100 120
224
CURRENT CONSUMPTION (µA)
10627-
TEMPERATURE (°C)
10627- Figure 12. Current Consumption at 25°C, 100 Hz Output Data Rate, VS = 2.5 V Figure 15. Z-Axis Sensitivity vs. Temperature— Eight Parts Soldered to PCB, VS = 2.5 V, Full Resolution Rev. 0 | Page 8 of 36 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Absolute Maximum Ratings Thermal Resistance Package Information ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Power Sequencing Power Savings Power Modes Auto Sleep Mode Standby Mode Serial Communications SPI Preventing Bus Traffic Errors I2C Interrupts DATA_READY SINGLE_TAP DOUBLE_TAP Activity Inactivity FREE_FALL Watermark Overrun FIFO Bypass Mode FIFO Mode Stream Mode Trigger Mode Retrieving Data from FIFO Self-Test Register Map Register Definitions Register 0x00—DEVID (Read Only) Register 0x1D—THRESH_TAP (Read/Write) Register 0x1E, Register 0x1F, Register 0x20—OFSX, OFSY, OFSZ (Read/Write) Register 0x21—DUR (Read/Write) Register 0x22—Latent (Read/Write) Register 0x23—Window (Read/Write) Register 0x24—THRESH_ACT (Read/Write) Register 0x25—THRESH_INACT (Read/Write) Register 0x26—TIME_INACT (Read/Write) Register 0x27—ACT_INACT_CTL (Read/Write) ACT AC/DC and INACT AC/DC Bits ACT_x Enable Bits and INACT_x Enable Bits Register 0x28—THRESH_FF (Read/Write) Register 0x29—TIME_FF (Read/Write) Register 0x2A—TAP_AXES (Read/Write) Suppress Bit TAP_x Enable Bits Register 0x2B—ACT_TAP_STATUS (Read Only) ACT_x Source and TAP_x Source Bits Asleep Bit Register 0x2C—BW_RATE (Read/Write) LOW_POWER Bit Rate Bits Register 0x2D—POWER_CTL (Read/Write) Link Bit AUTO_SLEEP Bit Measure Bit Sleep Bit Wakeup Bits Register 0x2E—INT_ENABLE (Read/Write) Register 0x2F—INT_MAP (Read/Write) Register 0x30—INT_SOURCE (Read Only) Register 0x31—DATA_FORMAT (Read/Write) SELF_TEST Bit SPI Bit INT_INVERT Bit FULL_RES Bit Justify Bit Range Bits Register 0x32 to Register 0x37—DATAX0, DATAX1, DATAY0, DATAY1, DATAZ0, DATAZ1 (Read Only) Register 0x38—FIFO_CTL (Read/Write) FIFO_MODE Bits Trigger Bit Samples Bits 0x39—FIFO_STATUS (Read Only) FIFO_TRIG Bit Entries Bits Applications Information Power Supply Decoupling Mechanical Considerations for Mounting Tap Detection Threshold Link Mode Sleep Mode vs. Low Power Mode Offset Calibration Using Self-Test Data Formatting of Upper Data Rates Noise Performance Operation at Voltages Other Than 2.5 V Offset Performance at Lowest Data Rates Axes of Acceleration Sensitivity Layout and Design Recommendations Outline Dimensions Ordering Guide