Datasheet ADXL375 (Analog Devices) - 2

HerstellerAnalog Devices
Beschreibung3-Axis, ±200 g Digital MEMS Accelerometer
Seiten / Seite33 / 2 — ADXL375* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017. …
RevisionB
Dateiformat / GrößePDF / 563 Kb
DokumentenspracheEnglisch

ADXL375* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017. COMPARABLE PARTS. DESIGN RESOURCES. EVALUATION KITS

ADXL375* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017 COMPARABLE PARTS DESIGN RESOURCES EVALUATION KITS

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ADXL375* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017 COMPARABLE PARTS DESIGN RESOURCES
View a parametric search of comparable parts. • ADXL375 Material Declaration • PCN-PDN Information
EVALUATION KITS
• Quality And Reliability • ADXL375Z Evaluation Board • Symbols and Footprints • Real Time Eval System for Digital Output Sensor
DISCUSSIONS DOCUMENTATION
View all ADXL375 EngineerZone Discussions.
Application Notes
• AN-1266: Autonomous Shock Event Monitoring with the
SAMPLE AND BUY
ADXL375 Visit the product page to see pricing options.
Data Sheet
• ADXL375: 3-Axis, ±200 g Digital MEMS Accelerometer
TECHNICAL SUPPORT
Data Sheet Submit a technical question or find your regional support
User Guides
number. • UG-598: 3-Axis, ±200 g Digital Accelerometer Evaluation Board for ADXL375
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REFERENCE MATERIALS Press
• Analog Devices’ 3-axis High-g MEMS Accelerometer Enables Highly Accurate Impact, Shock, and Concussive Detection Systems
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Document Outline Features Applications General Description Functional Block Diagram Table of Contents Revision History Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Soldering Profile Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Power Sequencing Current Consumption and Output Data Rate Power Saving Modes Low Power Mode Autosleep Mode Standby Mode FIFO Buffer Bypass Mode FIFO Mode Stream Mode Trigger Mode Retrieving Data from the FIFO Buffer Self-Test Interrupts Enabling and Disabling Interrupts Clearing Interrupts Bits in the Interrupt Registers DATA_READY Bit SINGLE_SHOCK Bit DOUBLE_SHOCK Bit Activity Bit Inactivity Bit Watermark Bit Overrun Bit Serial Communications SPI Mode Preventing Bus Traffic Errors I2C Mode Register Map Register Descriptions Register 0x00—DEVID (Read Only) Register 0x1D—THRESH_SHOCK (Read/Write) Register 0x1E, Register 0x1F, Register 0x20—OFSX, OFSY, OFSZ (Read/Write) Register 0x21—DUR (Read/Write) Register 0x22—Latent (Read/Write) Register 0x23—Window (Read/Write) Register 0x24—THRESH_ACT (Read/Write) Register 0x25—THRESH_INACT (Read/Write) Register 0x26—TIME_INACT (Read/Write) Register 0x27—ACT_INACT_CTL (Read/Write) ACT AC/DC and INACT AC/DC Bits ACT_x Enable and INACT_x Enable Bits Register 0x2A—SHOCK_AXES (Read/Write) Suppress Bit SHOCK_x Enable Bits Register 0x2B—ACT_SHOCK_STATUS (Read Only) ACT_x Source and SHOCK_x Source Bits Asleep Bit Register 0x2C—BW_RATE (Read/Write) LOW_POWER Bit Rate Bits Register 0x2D—POWER_CTL (Read/Write) Link Bit AUTO_SLEEP Bit Measure Bit Sleep Bit Wakeup Bits Register 0x2E—INT_ENABLE (Read/Write) Register 0x2F—INT_MAP (Read/Write) Register 0x30—INT_SOURCE (Read Only) Register 0x31—DATA_FORMAT (Read/Write) SELF_TEST Bit SPI Bit INT_INVERT Bit Justify Bit Register 0x32 to Register 0x37—DATAX0, DATAX1, DATAY0, DATAY1, DATAZ0, DATAZ1 (Read Only) Register 0x38—FIFO_CTL (Read/Write) FIFO_MODE Bits Trigger Bit Samples Bits Register 0x39—FIFO_STATUS (Read Only) FIFO_TRIG Bit Entries Bits Applications Information Power Supply Decoupling Mechanical Considerations for Mounting Shock Detection Threshold Detection and Bandwidth Link Mode Sleep Mode vs. Low Power Mode Offset Calibration Data Formatting at Output Data Rates of 3200 Hz and 1600 Hz Using Self-Test Axes of Acceleration Sensitivity Layout and Design Recommendations Package Information Outline Dimensions Ordering Guide