ADXL356/ADXL357Data SheetT2T1DRDYININ141312CS/SCL 111 VSUPPLYYSCLK/VSSIO 2ADXL35710 V1P8ANATOP VIEWMOSI/SDA 3(Not to Scale)9VSSXMISO/ASEL 48V1P8DIGZ567OODDISSIVEDVV 007 ESER R 15429- Figure 7. ADXL357 Pin Configuration (SPI/I2C) Table 9. ADXL357 PinFunction Descriptions Pin No.MnemonicDescription 1 CS/SCL Chip Select for SPI (CS). Serial Communications Clock for I2C (SCL). 2 SCLK/V Serial Communications Clock for SPI (SCLK). SSIO I2C Mode Enable (V ). Connect this pin to Pin 6 (V ) to enable I2C mode. SSIO SSIO 3 MOSI/SDA Master Output, Slave Input for SPI (MOSI). Serial Data for I2C (SDA). 4 MISO/ASEL Master Input, Slave Output for SPI (MISO). Alternate I2C Address Select for I2C (ASEL). 5 V Digital Interface Supply Voltage. DDIO 6 V Digital Ground. SSIO 7 RESERVED Reserved. This pin can be connected to ground or left open. 8 V Digital Supply. This pin requires a decoupling capacitor. If V connects to V , supply the voltage to this 1P8DIG SUPPLY SS pin externally. 9 V Analog Ground. SS 10 V Analog Supply. This pin requires a decoupling capacitor. If V connects to V , supply the voltage to this 1P8ANA SUPPLY SS pin externally. 11 V Supply Voltage. When V equals 2.25 V to 3.6 V, V enables the internal LDOs to generate V and SUPPLY SUPPLY SUPPLY 1P8DIG V . For V = V , V and V are externally supplied. 1P8ANA SUPPLY SS 1P8DIG 1P8ANA 12 INT1 Interrupt Pin 1. 13 INT2 Interrupt Pin 2. 14 DRDY Data Ready Pin. Rev. 0 | Page 10 of 42 Document Outline Features Applications Functional Block Diagrams General Description Revision History Specifications Analog Output for the ADXL356 Digital Output for the ADXL357 SPI Digital Interface Characteristics for the ADXL357 I2C Digital Interface Characteristics for the ADXL357 Absolute Maximum Ratings Thermal Resistance Recommended Soldering Profile ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Root Allan Variance (RAV) ADXL357 Characteristics Theory of Operation Applications Information Analog Output Digital Output Axes of Acceleration Sensitivity Power Sequencing Power Supply Description VSUPPLY V1P8ANA V1P8DIG VDDIO Overrange Protection Self Test Filter Serial Communications SPI Protocol I2C Protocol Reading Acceleration or Temperature Data from the Interface FIFO Interrupts DATA_RDY DRDY Pin FIFO_FULL FIFO_OVR Activity NVM_BUSY External Synchronization and Interpolation EXT_SYNC = 00—No External Sync or Interpolation EXT_SYNC = 10—External Sync with Interpolation EXT_SYNC = 01—External Sync and External Clock, No Interpolation Filter ADXL357 Register Map Register Definitions Analog Devices ID Register Address: 0x00, Reset: 0xAD, Name: DEVID_AD Analog Devices MEMS ID Register Address: 0x01, Reset: 0x1D, Name: DEVID_MST Device ID Register Address: 0x02, Reset: 0xED, Name: PARTID Product Revision ID Register Address: 0x03, Reset: 0x01, Name: REVID Status Register Address: 0x04, Reset: 0x00, Name: Status FIFO Entries Register Address: 0x05, Reset: 0x00, Name: FIFO_ENTRIES Temperature Data Registers Address: 0x06, Reset: 0x00, Name: TEMP2 Address: 0x07, Reset: 0x00, Name: TEMP1 X-Axis Data Registers Address: 0x08, Reset: 0x00, Name: XDATA3 Address: 0x09, Reset: 0x00, Name: XDATA2 Address: 0x0A, Reset: 0x00, Name: XDATA1 Y-Axis Data Registers Address: 0x0B, Reset: 0x00, Name: YDATA3 Address: 0x0C, Reset: 0x00, Name: YDATA2 Address: 0x0D, Reset: 0x00, Name: YDATA1 Z-Axis Data Registers Address: 0x0E, Reset: 0x00, Name: ZDATA3 Address: 0x0F, Reset: 0x00, Name: ZDATA2 Address: 0x10, Reset: 0x00, Name: ZDATA1 FIFO Access Register Address: 0x11, Reset: 0x00, Name: FIFO_DATA X-Axis Offset Trim Registers Address: 0x1E, Reset: 0x00, Name: OFFSET_X_H Address: 0x1F, Reset: 0x00, Name: OFFSET_X_L Y-Axis Offset Trim Registers Address: 0x20, Reset: 0x00, Name: OFFSET_Y_H Address: 0x21, Reset: 0x00, Name: OFFSET_Y_L Z-Axis Offset Trim Registers Address: 0x22, Reset: 0x00, Name: OFFSET_Z_H Address: 0x23, Reset: 0x00, Name: OFFSET_Z_L Activity Enable Register Address: 0x24, Reset: 0x00, Name: ACT_EN Activity Threshold Registers Address: 0x25, Reset: 0x00, Name: ACT_THRESH_H Address: 0x26, Reset: 0x00, Name: ACT_THRESH_L Activity Count Register Address: 0x27, Reset: 0x01, Name: ACT_COUNT Filter Settings Register Address: 0x28, Reset: 0x00, Name: Filter FIFO Samples Register Address: 0x29, Reset: 0x60, Name: FIFO_SAMPLES Interrupt Pin (INTx) Function Map Register Address: 0x2A, Reset: 0x00, Name: INT_MAP Data Synchronization Address: 0x2B, Reset: 0x00, Name: Sync I2C Speed, Interrupt Polarity, and Range Register Address: 0x2C, Reset: 0x81, Name: Range Power Control Register Address: 0x2D, Reset: 0x01, Name: POWER_CTL Self Test Register Address: 0x2E, Reset: 0x00, Name: SELF_TEST Reset Register Address: 0x2F, Reset: 0x00, Name: Reset PCB Footprint Pattern Outline Dimensions Ordering Guide