Datasheet LTC5505-1, LTC5505-2 (Analog Devices) - 5
| Hersteller | Analog Devices |
| Beschreibung | RF Power Detector with Buffered Output and >40dB Dynamic Range |
| Seiten / Seite | 8 / 5 — PI FU CTIO S. RFIN (Pin 1):. SHDN (Pin 3):. VOUT (Pin 4):. GND (Pin 2):. … |
| Dateiformat / Größe | PDF / 150 Kb |
| Dokumentensprache | Englisch |
PI FU CTIO S. RFIN (Pin 1):. SHDN (Pin 3):. VOUT (Pin 4):. GND (Pin 2):. VCC (Pin 5):. BLOCK DIAGRA
Modelllinie für dieses Datenblatt
Textversion des Dokuments
LTC5505-1/LTC5505-2
U U U PI FU CTIO S RFIN (Pin 1):
RF Input Voltage. Referenced to VCC. An
SHDN (Pin 3):
Shutdown Input. A logic low on the SHDN external coupling capacitor to the RF source is required. pin places the part in shutdown mode. A logic high enables The frequency range is 300MHz to 3GHz. This pin has an the part. SHDN has an internal 150k pull down resistor to internal 250Ω termination, an internal Schottky diode ensure that the part is in shutdown when the drivers are in detector and peak detector capacitor. (See Note 6 in the a tri-state condition. Electrical Characteristics.)
VOUT (Pin 4):
Buffered and Level Shifted Detector Output
GND (Pin 2):
System Ground. Voltage.
VCC (Pin 5):
Power Supply Voltage, 2.7V to 6V. VCC should be bypassed appropriately with ceramic capacitors.
W BLOCK DIAGRA
VCC 5 GAIN + COMPRESSION BUFFER 4 VOUT – SHDN 30k 250Ω RFIN 1 30k 100Ω 100Ω 28pF + RF DET 130mV – BIAS 60µA 60µA 22k 150k GND 2 5505 BD 3 SHDN 5505f 5
U U U PI FU CTIO S RFIN (Pin 1):
RF Input Voltage. Referenced to VCC. An
SHDN (Pin 3):
Shutdown Input. A logic low on the SHDN external coupling capacitor to the RF source is required. pin places the part in shutdown mode. A logic high enables The frequency range is 300MHz to 3GHz. This pin has an the part. SHDN has an internal 150k pull down resistor to internal 250Ω termination, an internal Schottky diode ensure that the part is in shutdown when the drivers are in detector and peak detector capacitor. (See Note 6 in the a tri-state condition. Electrical Characteristics.)
VOUT (Pin 4):
Buffered and Level Shifted Detector Output
GND (Pin 2):
System Ground. Voltage.
VCC (Pin 5):
Power Supply Voltage, 2.7V to 6V. VCC should be bypassed appropriately with ceramic capacitors.
W BLOCK DIAGRA
VCC 5 GAIN + COMPRESSION BUFFER 4 VOUT – SHDN 30k 250Ω RFIN 1 30k 100Ω 100Ω 28pF + RF DET 130mV – BIAS 60µA 60µA 22k 150k GND 2 5505 BD 3 SHDN 5505f 5