Datasheet LTC4318 (Analog Devices)

HerstellerAnalog Devices
BeschreibungDual I2C/SMBus Address Translator
Seiten / Seite16 / 1 — FeaTures. DescripTion. Allows Multiple Slaves with the Same Address to. …
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DokumentenspracheEnglisch

FeaTures. DescripTion. Allows Multiple Slaves with the Same Address to. Coexist on the Same Bus

Datasheet LTC4318 Analog Devices

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LTC4318 Dual I2C/SMBus Address Translator
FeaTures DescripTion
n
Allows Multiple Slaves with the Same Address to
The LTC®4318 enables the hardwired address of one or
Coexist on the Same Bus
more I2C or SMBus slave devices to be translated to a n
Resistor Configurable Address Translation
different address. This allows slaves with the same hard- n
No Software Programming Required
wired address to coexist on the same bus. Only discrete n Compatible with SMBus, I2C and I2C Fast Mode resistors are needed to select the new address and no n Pass-Through Mode Allows General Call Addressing software programming is required. Up to 127 different n ±4kV HBM ESD Ruggedness address translations are available. n Level Translation for 2.5V, 3.3V and 5V Buses The LTC4318 incorporates a pass-through mode which n Stuck Bus Timeout disables the address translations and allows general call n Prevents SDA and SCL Corruption During Live Board addressing by the master. The LTC4318 is designed to Insertion and Removal automatically recover from abnormal bus conditions like n Support Bus Hot Swap bus stuck low or premature STOP bits. n 20-Lead QFN 4mm × 4mm Package
NUMBER OF INPUT NUMBER OF OUTPUT PART NUMBER CHANNELS CHANNELS applicaTions
LTC4316 1 1 LTC4317 1 2 n I2C, SMBus Address Expansion LTC4318 2 2 n Address Translation L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear n Servers Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 6356140, 6650174, 7032051, 7478286. Patent pending. n Telecom
Typical applicaTion
3.3V 5V
TRANSLATES
VCC SCL
BY 0x02
SCLIN1 SCLOUT1 SCL MASTER #1 SLAVE# 1 R/W ACK SDA START ADDRESS BITS BIT BIT SDAIN1 SDAOUT1 SDA a6 a5 a4 a3 a2 a1 a0
SENDS RECEIVES
LTC4318
ADDRESS 0x34 ADDRESS 0X36
SCLIN1 3.3V ENABLE1 READY1 SDAIN1 0 0 1 1 0 1 0 0 = 0x34 ENABLE2 READY2 5V
TRANSLATES
TRANSLATION
BY 0x04
BYTE 0 0 0 0 0 0 1 0 = 0x02 SCL SCLIN2 SCLOUT2 SCL MASTER #1 SLAVE# 2 SDAOUT1 0 0 1 1 0 1 1 0 = 0x36 SDA SDAIN2 SDAOUT2 SDA 4318 TA01b
SENDS
XORH2
RECEIVES ADDRESS 0x32
GND XORH1
ADDRESS 0X36
XORL2 XORL1 3.3V 845k 61.9k 93.1k 4318 TA01a 4318fa For more information www.linear.com/LTC4318 1