Datasheet LTC4309 (Analog Devices) - 6

HerstellerAnalog Devices
BeschreibungLevel Shifting Low Offset Hot Swappable 2-Wire Bus Buffer with Stuck Bus Recovery
Seiten / Seite16 / 6 — PIN FUNCTIONS (DE12/GN16). ENABLE (Pin 1/Pin1):. READY (Pin 7/Pin 9):. …
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PIN FUNCTIONS (DE12/GN16). ENABLE (Pin 1/Pin1):. READY (Pin 7/Pin 9):. DISCEN (Pin 2/Pin 3 ):. FAULT. (Pin 8/Pin 11):

PIN FUNCTIONS (DE12/GN16) ENABLE (Pin 1/Pin1): READY (Pin 7/Pin 9): DISCEN (Pin 2/Pin 3 ): FAULT (Pin 8/Pin 11):

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LTC4309
PIN FUNCTIONS (DE12/GN16) ENABLE (Pin 1/Pin1):
Connection Enable Input. This 1.4V
READY (Pin 7/Pin 9):
Connection Ready Status Output. digital threshold input pin enables or disables the LTC4309. This open-drain N-channel MOSFET pin pulls low when For normal operation pull or connect ENABLE high. Driving ENABLE is low, when the start-up and connection sequence ENABLE below the 0.8V threshold isolates SDAIN from described in the Operation section has not been completed, SDAOUT, SCLIN from SCLOUT, asserts READY low, and or when the LTC4309 disconnects the input and output prohibits automatic clock and stop bit generation during a pins due to a bus stuck low condition. READY goes high fault condition. A rising edge on ENABLE after a fault has when ENABLE is high and connection is made between the occurred forces a connection between SDAIN, SDAOUT input and output pins. Connect a pull-up resistor, typically and SCLIN, SCLOUT. Connect to VCC if unused. 10k, from this pin to the bus pull-up supply. This pin can
DISCEN (Pin 2/Pin 3 ):
Bus Stuck Low Disconnect Enable be left open if unused. Input. This pin, when high, allows the stuck low bus
FAULT
timeout circuitry to disconnect the bus in a fault condition.
(Pin 8/Pin 11):
Bus Stuck Low Timeout Output. This When connected to GND, this pin disables the circuitry open drain N-channel MOSFET output pulls low after 30ms that disconnects the bus under a fault condition; however, when there is a bus stuck low condition on the output pins the FAULT pin will still go low. of the LTC4309. In normal operation FAULT is high. Connect a pull-up resistor, typically 10k, from this pin to the bus
SCLOUT (Pin 3/Pin 4):
Serial Clock Output. Connect this pull-up supply. This pin can be left open if unused. pin to a SCL bus segment where bus stuck low recovery is desired. If the output rise time accelerators are enabled, a
SDAIN (Pin 9/Pin 12):
Serial Clock Input. Connect this pull-up resistor should be connected between this pin and pin to a SDA bus segment where isolation from bus stuck a bus supply greater than or equal to V low issues is desired. If the input accelerator is enabled, a CC. Bus supplies can be lower than V pull-up resistor should be connected between this pin and CC if the output rise time accelerators are disabled. See Application Information section for a bus supply greater than or equal to VCC2. Bus supplies detailed bus pull-up supply options. can be lower than VCC2 if the input rise time accelerators are disabled. See Application Information section for
SCLIN (Pin 4/Pin 5):
Serial Clock Input. Connect this pin detailed bus pull-up supply options. to a SCL bus segment where isolation from bus stuck low issues is desired. If the input rise time accelerator is
SDAOUT (Pin 10/Pin 13):
Serial Clock Output. Connect this enabled, a pull-up resistor should be connected between pin to a SCL bus segment where bus stuck low recovery is this pin and a bus supply greater than or equal to V desired. If the output rise time accelerators are enabled, a CC2. Bus supplies can be lower than V pull-up resistor should be connected between this pin and CC2 if the input rise time accelerators are disabled. See Application Information a bus supply greater than or equal to VCC. Bus supplies section for detailed bus pull-up supply options. can be lower than VCC if the output rise time accelerators are disabled. See Application Information section for
ACC (Pin 5/Pin 6):
Rise Time Accelerator Control Input. detailed bus pull-up supply options. This nominal 0.7V threshold input pin enables and disables all rise time accelerators on the SDA and SCL pins. Connect
VCC2 (Pin 11/Pin 14):
Supply Voltage Input for SDAIN and ACC to GND to enable all four rise time accelerators or SCLIN Rise Time Accelerator Circuitry. VCC2 supplies the connect ACC to V rise time accelerator circuitry on the input side. Bypass CC to disable all four rise time accelerators. Connect ACC to V this pin to GND with a capacitor of at least 0.01μF and CC2 to GND to enable the accelerators on SDAOUT and SCLOUT only. place close to VCC2 for best results. If VCC2 is connected to GND, the input side rise time accelerator circuitry is
GND (Pin 6/Pin 8):
Device Ground. Connect this pin to a disabled, regardless of ACC. ground plane for best results. 4309fa 6