Datasheet LTC4304 (Analog Devices) - 9

LTC4304
OPERATION
A rising edge on ENABLE after a stuck bus condition has reduce power consumption, or bus capacitance beyond occurred forces a connection between SDAIN, SDAOUT that specifi ed in I2C, while still meeting system rise time and SCLIN, SCLOUT even if bus idle conditions are not requirements. During positive bus transitions, the LTC4304 met. At this time the internal 30ms timer is reset but not switches in 3.5mA (typical) of current to quickly slew the disabled. SDA and SCL lines once their DC voltages exceed 0.8V. Choose a pull-up resistor so that the bus will rise on its
Rise Time Accelerators
own at a rate of at least 0.8V/µs to guarantee activation Once connection has been established, rise time accel- of the accelerators. Rise time accelerators turn off when erator circuits on all four SDA and SCL pins are activated SDA and SCL lines are approximately 1V below VCC. (assuming accelerators are enabled, see ACC pin descrip- Rise time accelerators are automatically disabled during tion). These allow the use of a large pull-up resistor to automatic clocking.
APPLICATIONS INFORMATION Resistor Pull-Up Selection
The system pull-up resistors must be strong enough the LTC4304 drives the capacitance on the card side and to provide a positive slew rate of 0.8V/µs on the SDA the backplane must drive only the digital input capacitance and SCL pins, in order to activate the rise time accelera- of the LTC4304, which is less than 10pF. tors during rising edges. Choose maximum resistor value In most applications the LTC4304 will be used with a RPULL-UP(MAX) using the formula: staggered connector where VCC and GND will be long V – 0.8V • 1250 ns [ /V ( pins. SDA and SCL are medium length pins to ensure that BUS MIN ( ) ] ) R k PULLUP MAX ( )[ Ω] = the V C p [ F CC and GND pins make contact fi rst. This will allow BUS ] the precharge circuitry to be activated on SDA and SCL where VBUSMIN is the minimum operating pull-up sup- before they make contact. ENABLE is a short pin that is ply voltage, and CBUS the total capacitance on respec- pulled down when not connected. This is to ensure that the tive bus line. connection between the backplane and the cards data and For example, assume V clock busses is not enabled until the transients associated BUS = VCC = 3.3V, and assuming ±10% supply tolerance, V with live insertion have settled. BUSMIN = 2.97V. With CBUS = 100pF, RPULL-UP, MAX = 27.1k. Therefore a smaller pull-up Figure 3 shows the LTC4304 in a CompactPCITM confi gura- resistor than 27.1k must be used, so 10k works fi ne. tion. Connect VCC and ENABLE to the output of one of the
Live Insertion and Capacitance Buffering Application
CompactPCI power supply Hot Swap circuits. Use a pull-up resistor to ENABLE for a card side enable/disable. VCC is Figures 3 through 6 illustrate applications of the LTC4304 monitored by a fi ltered UVLO circuit. With the VCC voltage that take advantage of both its Hot SwapTM controlling and powering up after all the other pins have established con- capacitance buffering features. In all of these applications, nection, the UVLO circuit ensures that the backplane and note that if the I/O cards were plugged directly into the the card data and clock busses are not connected until backplane without the LTC4304 buffer, all of the backplane the transients associated with live insertion have settled. and card capacitances would add directly together, making Owing to their small capacitance, the SDAIN and SCLIN rise- and fall-time requirements diffi cult to meet. Placing a pins cause minimal disturbance on the backplane busses LTC4304 on the edge of each card, however, isolates the when they make contact with the connector. card capacitance from the backplane. For a given I/O card, Hot Swap is a trademark of Linear Technology Corporation. 4304fa 9