Datasheet LTC4303 (Analog Devices) - 3
| Hersteller | Analog Devices |
| Beschreibung | Hot Swappable 2-Wire Bus Buffer with Stuck Bus Recovery |
| Seiten / Seite | 12 / 3 — ELECTRICAL CHARACTERISTICS. The. denotes the specifi cations which apply … |
| Dateiformat / Größe | PDF / 563 Kb |
| Dokumentensprache | Englisch |
ELECTRICAL CHARACTERISTICS. The. denotes the specifi cations which apply over the full operating
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LTC4303
ELECTRICAL CHARACTERISTICS The
●
denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. VCC = 2.7V to 5.5V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VHYS SDA, SCL, Logic Input Threshold Voltage (Note 6) 50 mV Hysteresis tPHL_ENABLE Delay ENABLE High-Low to Disconnect VCC = 3.3V 300 ns tPHL_READY Delay READY High-Low after Disconnect 10 ns tPLH_ENABLE Delay ENABLE Low-High to Connect VCC = 3.3V ● 60 95 175 µs tPLH_READY Delay READY Low-High after Connect 10 ns IOFF_READY Ready Off Leakage Current ● ±10 µA
Rise-Time Accelerators
IPULLUPAC Transient Boosted Pull-Up Current Positive Transition on SDA, SCL, VCC = 2.7V, 2 3.5 5.5 mA Slew Rate = 0.8V/µs (Note 5)
Bus Stuck Low Timeout
tTIMEOUT Bus Stuck Low Timer SDAOUT, SCLOUT = 0V ● 25 30 35 ms
Input-Output Connection
VOS Input-Output Offset Voltage 10k to VCC on SDA, SCL, ● 40 80 120 mV 2.7k to VCC on SDA, SCL ● 50 100 150 mV VCC = 3.3V, VSDA/SCL = 0.2V (Note 4) CIN Digital Input Capacitance (Note 6) 10 pF SDAIN, SDAOUT, SCLIN, SCLOUT VIL, MAX Input Logic Low Voltage ● 0.4 V ILEAK Input Leakage Current SDA, SCL, VCC = 5.5V ● ±5 µA VOL Output Low Voltage, Input = 0 SDA, SCL Pins, ISINK = 4mA, VCC = 2.7V ● 0 0.19 0.3 V
Timing Characteristics
fI2C, MAX I2C Maximum Operating Frequency (Note 6) 400 600 kHz tBUF Bus Free Time Between Stop and Start (Note 6) 1.3 µs Condition tHD, STA Hold Time After (Repeated) (Note 6) 100 ns Start Condition tSU, STA Repeated Start Condition Set-Up Time (Note 6) 0 ns tSU, STO Stop Condition Set-Up Time (Note 6) 0 ns tHD, DATI Data Hold Time Input (Note 6) 0 ns tSU, DAT Data Set-Up Time (Note 6) 100 ns
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 4:
The connection circuitry always regulates the output to a higher may cause permanent damage to the device. Exposure to any Absolute voltage than its input. The magnitude of this offset voltage as a function of Maximum Rating condition for extended periods may affect device the pull-up resistor and VCC voltage is shown in the Typical Performance reliability and lifetime. Characteristics section.
Note 2:
All currents into pins are positive; all voltages are referenced to
Note 5:
IPULLUPAC varies with temperature and VCC voltage, as shown in GND unless otherwise specifi ed. the Typical Performance Characteristics section.
Note 3:
Pulsed less than 5µs.
Note 6:
Guaranteed by design, not tested in production.
Note 7:
ICC test performed with connection circuitry active. 4303fb 3
ELECTRICAL CHARACTERISTICS The
●
denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. VCC = 2.7V to 5.5V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VHYS SDA, SCL, Logic Input Threshold Voltage (Note 6) 50 mV Hysteresis tPHL_ENABLE Delay ENABLE High-Low to Disconnect VCC = 3.3V 300 ns tPHL_READY Delay READY High-Low after Disconnect 10 ns tPLH_ENABLE Delay ENABLE Low-High to Connect VCC = 3.3V ● 60 95 175 µs tPLH_READY Delay READY Low-High after Connect 10 ns IOFF_READY Ready Off Leakage Current ● ±10 µA
Rise-Time Accelerators
IPULLUPAC Transient Boosted Pull-Up Current Positive Transition on SDA, SCL, VCC = 2.7V, 2 3.5 5.5 mA Slew Rate = 0.8V/µs (Note 5)
Bus Stuck Low Timeout
tTIMEOUT Bus Stuck Low Timer SDAOUT, SCLOUT = 0V ● 25 30 35 ms
Input-Output Connection
VOS Input-Output Offset Voltage 10k to VCC on SDA, SCL, ● 40 80 120 mV 2.7k to VCC on SDA, SCL ● 50 100 150 mV VCC = 3.3V, VSDA/SCL = 0.2V (Note 4) CIN Digital Input Capacitance (Note 6) 10 pF SDAIN, SDAOUT, SCLIN, SCLOUT VIL, MAX Input Logic Low Voltage ● 0.4 V ILEAK Input Leakage Current SDA, SCL, VCC = 5.5V ● ±5 µA VOL Output Low Voltage, Input = 0 SDA, SCL Pins, ISINK = 4mA, VCC = 2.7V ● 0 0.19 0.3 V
Timing Characteristics
fI2C, MAX I2C Maximum Operating Frequency (Note 6) 400 600 kHz tBUF Bus Free Time Between Stop and Start (Note 6) 1.3 µs Condition tHD, STA Hold Time After (Repeated) (Note 6) 100 ns Start Condition tSU, STA Repeated Start Condition Set-Up Time (Note 6) 0 ns tSU, STO Stop Condition Set-Up Time (Note 6) 0 ns tHD, DATI Data Hold Time Input (Note 6) 0 ns tSU, DAT Data Set-Up Time (Note 6) 100 ns
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 4:
The connection circuitry always regulates the output to a higher may cause permanent damage to the device. Exposure to any Absolute voltage than its input. The magnitude of this offset voltage as a function of Maximum Rating condition for extended periods may affect device the pull-up resistor and VCC voltage is shown in the Typical Performance reliability and lifetime. Characteristics section.
Note 2:
All currents into pins are positive; all voltages are referenced to
Note 5:
IPULLUPAC varies with temperature and VCC voltage, as shown in GND unless otherwise specifi ed. the Typical Performance Characteristics section.
Note 3:
Pulsed less than 5µs.
Note 6:
Guaranteed by design, not tested in production.
Note 7:
ICC test performed with connection circuitry active. 4303fb 3