Datasheet LTC4301L (Analog Devices)
| Hersteller | Analog Devices |
| Beschreibung | Hot Swappable 2-Wire Bus Buffer with Low Voltage Level Translation |
| Seiten / Seite | 12 / 1 — FEATURES. DESCRIPTIO. Level Translates 1V Signals to Standard 3.3V and. … |
| Dateiformat / Größe | PDF / 189 Kb |
| Dokumentensprache | Englisch |
FEATURES. DESCRIPTIO. Level Translates 1V Signals to Standard 3.3V and. 5V Logic Rails
Modelllinie für dieses Datenblatt
Textversion des Dokuments
LTC4301L Hot Swappable 2-Wire Bus Buffer with Low Voltage
U
Level Translation
FEATURES DESCRIPTIO
■
Level Translates 1V Signals to Standard 3.3V and
The LTC®4301L hot swappable, 2-wire bus buffer allows
5V Logic Rails
I/O card insertion into a live backplane without corruption ■
Allows Bus Pull-Up Voltages as Low as 1V on
of the data and clock busses. In addition, the LTC4301L
SDAIN and SCLIN
SDAIN and SCLIN pins are compatible with systems with ■
Bidirectional Buffer* for SDA and SCL Lines
pull-up voltages as low as 1V. Control circuitry prevents
Increases Fanout
the backplane from being connected to the card until a ■
Prevents SDA and SCL Corruption During Live Board
stop bit or a bus idle is present. When the connection is
Insertion and Removal from Backplane
made, the LTC4301L provides bidirectional buffering, ■
Isolates Input SDA and SCL Line from Output
keeping the backplane and card capacitances isolated. ■
10kV Human Body Model ESD Protection
When driven low, the CS input pin allows the part to ■ Supports Clock Stretching, Arbitration and connect after a stop bit or bus idle occurs. Driving CS high Synchronization breaks the connection between SCLIN and SCLOUT and ■ High Impedance SDA, SCL Pins for VCC = 0V between SDAIN and SDAOUT. A logic high on READY ■ CS Gates Connection from Input to Output indicates that the backplane and card sides are connected ■ Compatible with I2CTM, I2C Fast Mode and SMBus together. Standards (Up to 400kHz Operation) ■ Small 8-Pin MSOP and DFN (3mm × 3mm) Packages The LTC4301L is offered in 8-pin DFN (3mm × 3mm) and
U
MSOP packages.
APPLICATIO S
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. ■ Hot Board Insertion All other trademarks are the property of their respective owners. Protected by U.S. Patents including 7032051. ■ Servers ■ Capacitance Buffer/Bus Extender ■ Desktop Computers
U TYPICAL APPLICATIO Input-Output Connection
1.2V 3.3V 0.01µF 2k 2k 10k 10k V V CC CC SDA SDAIN SDAOUT SDA OUTPUT INPUT SIDE SIDE µP LTC4301L 20pF 55pF SCL SCLIN SCLOUT SCL 0.5V/DIV CS READY GND GND 4301l TA01a 4301 TA01b 1µs/DIV 4301lfa 1
U
Level Translation
FEATURES DESCRIPTIO
■
Level Translates 1V Signals to Standard 3.3V and
The LTC®4301L hot swappable, 2-wire bus buffer allows
5V Logic Rails
I/O card insertion into a live backplane without corruption ■
Allows Bus Pull-Up Voltages as Low as 1V on
of the data and clock busses. In addition, the LTC4301L
SDAIN and SCLIN
SDAIN and SCLIN pins are compatible with systems with ■
Bidirectional Buffer* for SDA and SCL Lines
pull-up voltages as low as 1V. Control circuitry prevents
Increases Fanout
the backplane from being connected to the card until a ■
Prevents SDA and SCL Corruption During Live Board
stop bit or a bus idle is present. When the connection is
Insertion and Removal from Backplane
made, the LTC4301L provides bidirectional buffering, ■
Isolates Input SDA and SCL Line from Output
keeping the backplane and card capacitances isolated. ■
10kV Human Body Model ESD Protection
When driven low, the CS input pin allows the part to ■ Supports Clock Stretching, Arbitration and connect after a stop bit or bus idle occurs. Driving CS high Synchronization breaks the connection between SCLIN and SCLOUT and ■ High Impedance SDA, SCL Pins for VCC = 0V between SDAIN and SDAOUT. A logic high on READY ■ CS Gates Connection from Input to Output indicates that the backplane and card sides are connected ■ Compatible with I2CTM, I2C Fast Mode and SMBus together. Standards (Up to 400kHz Operation) ■ Small 8-Pin MSOP and DFN (3mm × 3mm) Packages The LTC4301L is offered in 8-pin DFN (3mm × 3mm) and
U
MSOP packages.
APPLICATIO S
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. ■ Hot Board Insertion All other trademarks are the property of their respective owners. Protected by U.S. Patents including 7032051. ■ Servers ■ Capacitance Buffer/Bus Extender ■ Desktop Computers
U TYPICAL APPLICATIO Input-Output Connection
1.2V 3.3V 0.01µF 2k 2k 10k 10k V V CC CC SDA SDAIN SDAOUT SDA OUTPUT INPUT SIDE SIDE µP LTC4301L 20pF 55pF SCL SCLIN SCLOUT SCL 0.5V/DIV CS READY GND GND 4301l TA01a 4301 TA01b 1µs/DIV 4301lfa 1