Datasheet MCP4801, MCP4811, MCP4821 (Microchip) - 6

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MCP4801/4811/4821 ELECTRICAL CHARACTERISTIC WITH EXTENDED TEMPERATURE (CONTINUED) Electrical Specifications:
Unless otherwise indicated, VDD = 5V, VSS = 0V, VREF = 2.048V, Output Buffer Gain (G) = 2x, RL = 5 k to GND, CL = 100 pF. Typical values are at +125°C by characterization or simulation.
Parameters Sym Min Typ Max Units Conditions Output Amplifier
Output Swing VOUT — 0.01 to — V Accuracy is better than 1 LSb VDD – 0.04 for VOUT = 10 mV to (VDD – 40 mV) Phase Margin PM — 66 — Degree (°) CL = 400 pF, RL =  Slew Rate SR — 0.55 — V/µs Short Circuit Current ISC — 17 — mA Settling Time tSETTLING — 4.5 — µs Within ½ LSb of final value from ¼ to ¾ full-scale range
Dynamic Performance (Note 2)
Major Code Transition — 45 — nV-s 1 LSb change around major Glitch carry (0111...1111 to 1000...0000) Digital Feedthrough — <10 — nV-s
Note 1:
Guaranteed monotonic by design over all codes.
2:
This parameter is ensured by design, and not 100% tested.
AC CHARACTERISTICS (SPI TIMING SPECIFICATIONS) Electrical Specifications:
Unless otherwise indicated, VDD= 2.7V – 5.5V, TA= -40 to +125°C. Typical values are at +25°C.
Parameters Sym Min Typ Max Units Conditions
Schmitt Trigger High-Level Input VIH 0.7 V — — V Voltage (All digital input pins) DD Schmitt Trigger Low-Level Input VIL — — 0.2 VDD V Voltage (All digital input pins) Hysteresis of Schmitt Trigger Inputs VHYS — 0.05 VDD — Input Leakage Current ILEAKAGE -1 — 1 A SHDN = LDAC = CS = SDI = SCK = VDD or VSS Digital Pin Capacitance CIN, — 10 — pF VDD = 5.0V, TA = +25°C, (All inputs/outputs) COUT fCLK = 1 MHz
(Note 1)
Clock Frequency FCLK — — 20 MHz TA = +25°C
(Note 1)
Clock High Time tHI 15 — — ns
Note 1
Clock Low Time tLO 15 — — ns
Note 1
CS Fall to First Rising CLK Edge tCSSR 40 — — ns Applies only when CS falls with CLK high.
(Note 1)
Data Input Setup Time tSU 15 — — ns
Note 1
Data Input Hold Time tHD 10 — — ns
Note 1
SCK Rise to CS Rise Hold Time tCHS 15 — — ns
Note 1
CS High Time tCSH 15 — — ns
Note 1
LDAC Pulse Width tLD 100 — — ns
Note 1
LDAC Setup Time tLS 40 — — ns
Note 1
SCK Idle Time before CS Fall tIDLE 40 — — ns
Note 1 Note 1:
This parameter is ensured by design and not 100% tested. DS22244B-page 6  2010 Microchip Technology Inc. Document Outline 1.0 Electrical Characteristics FIGURE 1-1: SPI Input Timing Data. 2.0 Typical Performance Curves FIGURE 2-1: DNL vs. Code (MCP4821). FIGURE 2-2: DNL vs. Code and Temperature (MCP4821). FIGURE 2-3: Absolute DNL vs. Temperature (MCP4821). FIGURE 2-4: INL vs. Code and Temperature (MCP4821). FIGURE 2-5: Absolute INL vs. Temperature (MCP4821). FIGURE 2-6: INL vs. Code (MCP4821). FIGURE 2-7: DNL vs. Code and Temperature (MCP4811). FIGURE 2-8: INL vs. Code and Temperature (MCP4811). FIGURE 2-9: DNL vs. Code and Temperature (MCP4801). FIGURE 2-10: INL vs. Code and Temperature (MCP4801). FIGURE 2-11: Full-Scale VOUT vs. Ambient Temperature and VDD. Gain = 1x. FIGURE 2-12: Full-Scale VOUT vs. Ambient Temperature and VDD. Gain = 2x. FIGURE 2-13: Output Noise Voltage Density (VREF Noise Density) vs. Frequency. Gain = 1x. FIGURE 2-14: Output Noise Voltage (VREF Noise Voltage) vs. Bandwidth. Gain = 2x. FIGURE 2-15: IDD vs. Temperature and VDD. FIGURE 2-16: IDD Histogram (VDD = 2.7V). FIGURE 2-17: IDD Histogram (VDD = 5.0V). FIGURE 2-18: Hardware Shutdown Current vs. Temperature and VDD. FIGURE 2-19: Software Shutdown Current vs. Temperature and VDD. FIGURE 2-20: Offset Error vs. Temperature and VDD. FIGURE 2-21: Gain Error vs. Temperature and VDD. FIGURE 2-22: VIN High Threshold vs. Temperature and VDD. FIGURE 2-23: VIN Low Threshold vs. Temperature and VDD. FIGURE 2-24: Input Hysteresis vs. Temperature and VDD. FIGURE 2-25: VOUT High Limit vs.Temperature and VDD. FIGURE 2-26: VOUT Low Limit vs. Temperature and VDD. FIGURE 2-27: IOUT High Short vs. Temperature and VDD. FIGURE 2-28: IOUT vs. VOUT. Gain = 2x. FIGURE 2-29: VOUT Rise Time. FIGURE 2-30: VOUT Fall Time. FIGURE 2-31: VOUT Rise Time. FIGURE 2-32: VOUT Rise Time. FIGURE 2-33: VOUT Rise Time Exit Shutdown. FIGURE 2-34: PSRR vs. Frequency. 3.0 Pin descriptions TABLE 3-1: Pin Function Table for MCP4801/4811/4821 3.1 Supply Voltage Pins (VDD, VSS) 3.2 Chip Select (CS) 3.3 Serial Clock Input (SCK) 3.4 Serial Data Input (SDI) 3.5 Latch DAC Input (LDAC) 3.6 Analog Output (VOUT) 3.7 Exposed Thermal Pad (EP) 4.0 General Overview TABLE 4-1: LSb of each device FIGURE 4-1: Example for INL Error. FIGURE 4-2: Example for DNL Error. 4.1 Circuit Descriptions FIGURE 4-3: Typical Transient Response. FIGURE 4-4: Output Stage for Shutdown Mode. 5.0 Serial Interface 5.1 Overview 5.2 Write Command FIGURE 5-1: Write Command for MCP4821 (12-bit DAC). FIGURE 5-2: Write Command for MCP4811 (10-bit DAC). FIGURE 5-3: Write Command for MCP4801 (8-bit DAC). 6.0 Typical Applications 6.1 Digital Interface 6.2 Power Supply Considerations 6.3 Output Noise Considerations FIGURE 6-1: Typical Connection Diagram. 6.4 Layout Considerations 6.5 Single-Supply Operation 6.6 Bipolar Operation 6.7 Selectable Gain and Offset Bipolar Voltage Output 6.8 Designing a Double-Precision DAC 6.9 Building Programmable Current Source 7.0 Development support 7.1 Evaluation & Demonstration Boards 8.0 Packaging Information 8.1 Package Marking Information Corporate Office Atlanta Boston Chicago Cleveland Fax: 216-447-0643 Dallas Detroit Kokomo Toronto Fax: 852-2401-3431 Australia - Sydney China - Beijing China - Shanghai India - Bangalore Korea - Daegu Korea - Seoul Singapore Taiwan - Taipei Fax: 43-7242-2244-393 Denmark - Copenhagen France - Paris Germany - Munich Italy - Milan Spain - Madrid UK - Wokingham Worldwide Sales and Service