Datasheet TC7650 (Microchip) - 4

HerstellerMicrochip
BeschreibungTC7650 CMOS chopper-stabilized operational amplifier practically removes offset voltage error terms from system error calculations
Seiten / Seite14 / 4 — TC7650. 2.0. PIN DESCRIPTIONS. TABLE 2-1:. PIN FUNCTION TABLE. Pin …
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TC7650. 2.0. PIN DESCRIPTIONS. TABLE 2-1:. PIN FUNCTION TABLE. Pin Number. Symbol. Description. 8-pin DIP. 14-pin DIP. 3.0

TC7650 2.0 PIN DESCRIPTIONS TABLE 2-1: PIN FUNCTION TABLE Pin Number Symbol Description 8-pin DIP 14-pin DIP 3.0

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TC7650 2.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1: PIN FUNCTION TABLE Pin Number Symbol Description 8-pin DIP 14-pin DIP
1,8 2,1 CA, CB Nulling capacitor pins 2 4 -INPUT Inverting Input 3 5 +INPUT Non-inverting Input 4 7 VSS Negative Power Supply 5 9 OUTPUT Output Voltage Clamp CLAMP 6 10 OUTPUT Output 7 11 VDD Positive Power Supply — 3,6 NC No internal connection — 8 CRETN Capacitor current return pin — 12 INT CLK OUT Internal Clock Output — 13 EXT CLK IN External Clock Input — 14 INT/EXT Select Internal or External Clock
3.0 DETAILED DESCRIPTION
After the nulling amplifier is zeroed, the main amplifier is zeroed; the A switches open and B switches close.
3.1 Theory of Operation
The output voltage equation is: Figure 3-1 shows the major elements of the TC7650. There are two amplifiers (the main amplifier and the
EQUATION 3-2:
nulling amplifier), and both have offset null capability. The main amplifier is connected full-time from the input V   OUT = AM VOSM + (V+ - V-) + AN(V+ - V-) + AN VOSE to the output. The nulling amplifier, under the control of the chopping frequency oscillator and clock circuit, alternately nulls itself and the main amplifier. Two exter-
EQUATION 3-3:
nal capacitors provide the required storage of the null- ing potentials and the necessary nulling loop time + - V + V OSM OSN V = A A V – V  + ---------------------- constants. The nulling arrangement operates over the OUT M N AN full common mode and power supply ranges, and is also independent of the output level, thus giving excep- As desired, the device offset voltages are reduced by tionally high CMRR, PSRR and AVOL. the high open loop gain of the nulling amplifier. Careful balancing of the input switches minimizes chopper frequency charge injection at the input termi-
3.2 Output Stage/Loading
nals, and the feed forward type injection into the com- pensation capacitor that can cause output spikes in this The output circuit is a high impedance stage (approxi- type of circuit. mately 18k). With loads less than this, the chopper The circuit's offset voltage compensation is easily amplifier behaves in some ways like a trans-conduc- shown. With the nulling inputs shorted, a voltage tance amplifier whose open-loop gain is proportional to almost identical to the nulling amplifier offset voltage is load resistance. For example, the open loop gain will stored on C be 17dB lower with a 1k load than with a 10k load. A. The effective offset voltage at the null amplifier input is: If the amplifier is used strictly for DC, the lower gain is of little consequence, since the DC gain is typically
EQUATION 3-1:
greater than 120dB, even with a 1k load. In wideband applications, the best frequency response will be 1 V = --------- V achieved with a load resistor of 10k or higher. This OSE A + 1 OSN N results in a smooth 6dB/octave response from 0.1Hz to 2MHz, with phase shifts of less than 10° in the transi- DS21463C-page 4  2001-2012 Microchip Technology Inc.