Datasheet MCP6V61, MCP6V61U, MCP6V62, MCP6V64 (Microchip)

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MCP6V61/1U/2/4 80 µA, 1 MHz Zero-Drift Op Amps Features General Description
• High DC Precision: The Microchip Technology Inc. MCP6V61/1U/2/4 - VOS Drift: ±15 nV/°C (maximum, VDD = 5.5V) family of operational amplifiers provides input offset - V voltage correction for very low offset and offset drift. OS: ±8 µV (maximum) - A These devices have a gain bandwidth product of OL: 125 dB (minimum, VDD = 5.5V) 1 MHz (typical). They are unity-gain stable, have - PSRR: 117 dB (minimum, VDD = 5.5V) virtually no 1/f noise and have good Power Supply - CMRR: 120 dB (minimum, VDD = 5.5V) Rejection Ratio (PSRR) and Common Mode Rejection - Eni: 0.54 µVP-P (typical), f = 0.1 Hz to 10 Hz Ratio (CMRR). These products operate with a single - Eni: 0.17 µVP-P (typical), f = 0.01 Hz to 1 Hz supply voltage as low as 1.8V, while drawing • Enhanced EMI Protection: 80 µA/amplifier (typical) of quiescent current. - Electromagnetic Interference Rejection Ratio The Microchip Technology Inc. MCP6V61/1U/2/4 op (EMIRR) at 1.8 GHz: 101 dB amps are offered in single (MCP6V61 and • Low Power and Supply Voltages: MCP6V61U), dual (MCP6V62) and quad (MCP6V64) packages. They were designed using an advanced - IQ: 80 µA/amplifier (typical) CMOS process. - Wide Supply Voltage Range: 1.8V to 5.5V • Smal Packages:
Package Types
- Singles in SC70, SOT-23 - Duals in MSOP-8, 2x3 TDFN
MCP6V61 MCP6V62
SOT-23 MSOP - Quads in TSSOP-14 • Easy to Use: V 1 5 V V OUT DD V 1 8 OUTA DD - Rail-to-Rail Input/Output V 2 7 V SS 2 VINA– OUTB - Gain Bandwidth Product: 1 MHz (typical) V V 3 6 V IN+ 3 4 VIN– INA+ INB– - Unity Gain Stable VSS 4 5 VINB+ • Extended Temperature Range: -40°C to +125°C
MC M P6V6 C 1U P6V6 MCP6V62 Typical Applications
SC70 SC7 , SOT- , SOT 23 - 2×3 TDFN * • Portable Instrumentation VIN+ 1 5 V V V IN+ 1 5 VDD OUTA 1 8 DD • Sensor Conditioning DD VSS 2 V 2 EP 7 V • Temperature Measurement SS INA– OUTB V 9 VIN– 3 4 V V 3 6 V • DC Offset Correction IN– OUT INA+ INB– VSS 4 5 VINB+ • Medical Instrumentation
Design Aids MCP6V64
• SPICE Macro Models TSSOP • FilterLab® Software V 1 14 V OUTA OUTD • Microchip Advanced Part Selector (MAPS) V V INA– 2 13 IND– • Analog Demonstration and Evaluation Boards VINA+ 3 12 VIND+ • Application Notes VDD 4 11 VSS V 5 10 VINC+
Related Parts
INB+ VINB– 6 9 VINC– • MCP6V11/1U/2/4: Zero-Drift, Low Power VOUTB 7 8 VOUTC • MCP6V31/1U/2/4: Zero-Drift, Low Power • MCP6V71/1U/2/4: Zero-Drift, 2 MHz * Includes Exposed Thermal Pad (EP); see Table 3-1. • MCP6V81/1U: Zero-Drift, 5 MHz • MCP6V91/1U: Zero-Drift, 10 MHz  2014-2015 Microchip Technology Inc. DS20005367B-page 1 Document Outline Features Typical Applications Design Aids Related Parts General Description Package Types Typical Application Circuit FIGURE 1: Input Offset Voltage vs. Ambient Temperature with VDD = 1.8V. FIGURE 2: Input Offset Voltage vs. Ambient Temperature with VDD = 5.5V. 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 Specifications TABLE 1-1: DC Electrical Specifications TABLE 1-2: AC Electrical Specifications TABLE 1-3: Temperature Specifications 1.3 Timing Diagrams FIGURE 1-1: Amplifier Start-Up. FIGURE 1-2: Offset Correction Settling Time. FIGURE 1-3: Output Overdrive Recovery. 1.4 Test Circuits FIGURE 1-4: AC and DC Test Circuit for Most Non-Inverting Gain Conditions. FIGURE 1-5: AC and DC Test Circuit for Most Inverting Gain Conditions. FIGURE 1-6: Test Circuit for Dynamic Input Behavior. 2.0 Typical Performance Curves 2.1 DC Input Precision FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage Quadratic Temp. Co. FIGURE 2-4: Input Offset Voltage vs. Power Supply Voltage with VCM = VCML. FIGURE 2-5: Input Offset Voltage vs. Power Supply Voltage with VCM = VCMH. FIGURE 2-6: Input Offset Voltage vs. Output Voltage with VDD = 1.8V. FIGURE 2-7: Input Offset Voltage vs. Output Voltage with VDD = 5.5V. FIGURE 2-8: Input Offset Voltage vs. Common Mode Voltage with VDD = 1.8V. FIGURE 2-9: Input Offset Voltage vs. Common Mode Voltage with VDD = 5.5V. FIGURE 2-10: Common Mode Rejection Ratio. FIGURE 2-11: Power Supply Rejection Ratio. FIGURE 2-12: DC Open-Loop Gain. FIGURE 2-13: CMRR and PSRR vs. Ambient Temperature. FIGURE 2-14: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-15: Input Bias and Offset Currents vs. Common Mode Input Voltage with TA = +85°C. FIGURE 2-16: Input Bias and Offset Currents vs. Common Mode Input Voltage with TA = +125°C. FIGURE 2-17: Input Bias and Offset Currents vs. Ambient Temperature with VDD = 5.5V. FIGURE 2-18: Input Bias Current vs. Input Voltage (Below VSS). 2.2 Other DC Voltages and Currents FIGURE 2-19: Input Common Mode Voltage Headroom (Range) vs. Ambient Temperature. FIGURE 2-20: Output Voltage Headroom vs. Output Current. FIGURE 2-21: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-22: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-23: Supply Current vs. Power Supply Voltage. FIGURE 2-24: Power-On Reset Trip Voltage. FIGURE 2-25: Power-On Reset Voltage vs. Ambient Temperature. 2.3 Frequency Response FIGURE 2-26: CMRR and PSRR vs. Frequency. FIGURE 2-27: Open-Loop Gain vs. Frequency with VDD = 1.8V. FIGURE 2-28: Open-Loop Gain vs. Frequency with VDD = 5.5V. FIGURE 2-29: Gain Bandwidth Product and Phase Margin vs. Ambient Temperature. FIGURE 2-30: Gain Bandwidth Product and Phase Margin vs. Common Mode Input Voltage. FIGURE 2-31: Gain Bandwidth Product and Phase Margin vs. Output Voltage. FIGURE 2-32: Closed-Loop Output Impedance vs. Frequency with VDD = 1.8V. FIGURE 2-33: Closed-Loop Output Impedance vs. Frequency with VDD = 5.5V. FIGURE 2-34: Maximum Output Voltage Swing vs. Frequency. FIGURE 2-35: EMIRR vs. Frequency. FIGURE 2-36: EMIRR vs. Input Voltage. FIGURE 2-37: Channel-to-Channel Separation vs. Frequency. 2.4 Input Noise and Distortion FIGURE 2-38: Input Noise Voltage Density and Integrated Input Noise Voltage vs. Frequency. FIGURE 2-39: Input Noise Voltage Density vs. Input Common Mode Voltage. FIGURE 2-40: Intermodulation Distortion vs. Frequency with VCM Disturbance (see Figure 1-6). FIGURE 2-41: Inter-Modulation Distortion vs. Frequency with VDD Disturbance (see Figure 1-6). FIGURE 2-42: Input Noise vs. Time with 1 Hz and 10 Hz Filters and VDD = 1.8V. FIGURE 2-43: Input Noise vs. Time with 1 Hz and 10 Hz Filters and VDD = 5.5V. 2.5 Time Response FIGURE 2-44: Input Offset Voltage vs. Time with Temperature Change. FIGURE 2-45: Input Offset Voltage vs. Time at Power-Up. FIGURE 2-46: The MCP6V61/1U/2/4 Family Shows No Input Phase Reversal with Overdrive. FIGURE 2-47: Non-Inverting Small Signal Step Response. FIGURE 2-48: Non-Inverting Large Signal Step Response. FIGURE 2-49: Inverting Small Signal Step Response. FIGURE 2-50: Inverting Large Signal Step Response. FIGURE 2-51: Slew Rate vs. Ambient Temperature. FIGURE 2-52: Output Overdrive Recovery vs. Time with G = -10 V/V. FIGURE 2-53: Output Overdrive Recovery Time vs. Inverting Gain. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Exposed Thermal Pad (EP) 4.0 Applications 4.1 Overview of Zero-Drift Operation FIGURE 4-1: Simplified Zero-Drift Op Amp Functional Diagram. 4.1.1 Building Blocks 4.1.2 Chopping Action FIGURE 4-2: First Chopping Clock Phase; Equivalent Amplifier Diagram. FIGURE 4-3: Second Chopping Clock Phase; Equivalent Amplifier Diagram. 4.1.3 Intermodulation Distortion (IMD) 4.2 Other Functional Blocks 4.2.1 Rail-to-Rail Inputs FIGURE 4-4: Simplified Analog Input ESD Structures. FIGURE 4-5: Protecting the Analog Inputs Against High Voltages. FIGURE 4-6: Protecting the Analog Inputs Against High Currents. 4.2.2 Rail-to-Rail Output 4.3 Application Tips 4.3.1 Input Offset Voltage Over Temperature 4.3.2 DC Gain Plots 4.3.3 Offset at Power-Up 4.3.4 Source Resistances 4.3.5 Source Capacitance 4.3.6 Capacitive Loads FIGURE 4-7: Output Resistor, RISO, Stabilizes Capacitive Loads. FIGURE 4-8: Recommended RISO values for Capacitive Loads. 4.3.7 Stabilizing Output Loads FIGURE 4-9: Output Load. 4.3.8 Gain Peaking FIGURE 4-10: Amplifier with Parasitic Capacitance. 4.3.9 Reducing Undesired Noise and Signals 4.3.10 Supply Bypassing and Filtering 4.3.11 PCB Design for DC Precision 4.4 Typical Applications 4.4.1 Wheatstone Bridge FIGURE 4-11: Simple Design. 4.4.2 RTD Sensor FIGURE 4-12: RTD Sensor. 4.4.3 Offset Voltage Correction FIGURE 4-13: Offset Correction. 4.4.4 Precision Comparator FIGURE 4-14: Precision Comparator. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Microchip Advanced Part Selector (MAPS) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information 80 µA, 1 MHz Zero-Drift Op Amps Appendix A: Revision History Revision B (September 2015) Revision A (December 2014) Product Identification System AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE Worldwide Sales and Service