Datasheet ADA4870-KGD (Analog Devices) - 4
| Hersteller | Analog Devices |
| Beschreibung | High Speed, High Voltage, 1 A Output Drive Amplifier |
| Seiten / Seite | 8 / 4 — ADA4870-KGD. Known Good Die. Parameter. Test Conditions/Comments. Min. … |
| Dateiformat / Größe | PDF / 224 Kb |
| Dokumentensprache | Englisch |
ADA4870-KGD. Known Good Die. Parameter. Test Conditions/Comments. Min. Typ. Max. Unit. ±5 V SUPPLY. Table 2. Parameter
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ADA4870-KGD Known Good Die Parameter Test Conditions/Comments Min Typ Max Unit
POWER SUPPLY Operating Range 10 40 V Quiescent Current SD = VEE + 5 V, ON = VEE 32.5 33 mA SD = VEE, ON = not applicable 0.75 1 mA SD = VEE + 5 V, ON = VEE + 5 V 5.1 5.8 mA Positive Power Supply Rejection Ratio 67 69 dB Negative Power Supply Rejection Ratio 62 64 dB
±5 V SUPPLY
TCASE = 25°C, AV = −5, RF = 1.21 kΩ, RG = 243 Ω, CL = 300 pF, RS = 5 Ω, unless otherwise noted.
Table 2. Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE −3 dB Bandwidth VOUT = 2 V p-p 52 MHz Settling Time to 0.1% VOUT = 2 V step 55 ns NOISE/DISTORTION PERFORMANCE Harmonic Distortion, HD2/HD3 f = 30 MHz, VOUT = 2 V p-p, AV = −10 −42/−38 dBc f = 1 MHz, VOUT = 2 V p-p, AV = −10 −90/−88 dBc f = 0.1 MHz, VOUT = 2 V p-p, AV = −10 −101/−107 dBc f = 1 MHz, VOUT = 2 V p-p, RL = 25 Ω, AV = −10 −70/−66 dBc f = 0.1 MHz, VOUT = 2 V p-p, RL = 25 Ω, AV = −10 −85/−86 dBc Input Voltage Noise Density f = 100 kHz 2.1 nV/√Hz Input Current Noise Density f = 100 kHz INP 4.2 pA/√Hz INN 47 pA/√Hz DC PERFORMANCE Input Offset Voltage −15 −4 +5 mV Input Offset Voltage Drift 14 µV/°C Input Bias Current Noninverting Input 13 23 µA Inverting Input −5 −18 µA Input Bias Current Drift, Inverting Input 10 nA/°C Open-Loop Transresistance 1.9 MΩ INPUT CHARACTERISTICS Input Resistance INP 2 MΩ Input Capacitance INP 0.75 pF Input Common-Mode Voltage Range (VICM) ±3.0 V Common-Mode Rejection Ratio VICM = ±0.5 V, ±3.0 V 57 59 dB SD PIN (SHUTDOWN) Input Voltages High (enabled) VEE + 1.1 VEE + 5 V Low (power-down) VEE VEE + 0.9 V Input Bias Current Enabled (SD = VEE + 5 V) 110 µA Power down (SD = VEE) −65 µA ON PIN (RESET AND SHORT-CIRCUIT PROTECTION) Input Voltages High (power-down) VEE + 1.8 VEE + 5 V Low (enabled) VEE VEE + 1.3 V Input Bias Current Enabled (ON = VEE) −75 µA Power down (ON = VEE + 5 V) 100 µA Rev. 0 | Page 4 of 8 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ±20 V SUPPLY ±5 V SUPPLY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS OUTLINE DIMENSIONS DIE SPECIFICATIONS AND ASSEMBLY RECOMMENDATIONS ORDERING GUIDE
POWER SUPPLY Operating Range 10 40 V Quiescent Current SD = VEE + 5 V, ON = VEE 32.5 33 mA SD = VEE, ON = not applicable 0.75 1 mA SD = VEE + 5 V, ON = VEE + 5 V 5.1 5.8 mA Positive Power Supply Rejection Ratio 67 69 dB Negative Power Supply Rejection Ratio 62 64 dB
±5 V SUPPLY
TCASE = 25°C, AV = −5, RF = 1.21 kΩ, RG = 243 Ω, CL = 300 pF, RS = 5 Ω, unless otherwise noted.
Table 2. Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE −3 dB Bandwidth VOUT = 2 V p-p 52 MHz Settling Time to 0.1% VOUT = 2 V step 55 ns NOISE/DISTORTION PERFORMANCE Harmonic Distortion, HD2/HD3 f = 30 MHz, VOUT = 2 V p-p, AV = −10 −42/−38 dBc f = 1 MHz, VOUT = 2 V p-p, AV = −10 −90/−88 dBc f = 0.1 MHz, VOUT = 2 V p-p, AV = −10 −101/−107 dBc f = 1 MHz, VOUT = 2 V p-p, RL = 25 Ω, AV = −10 −70/−66 dBc f = 0.1 MHz, VOUT = 2 V p-p, RL = 25 Ω, AV = −10 −85/−86 dBc Input Voltage Noise Density f = 100 kHz 2.1 nV/√Hz Input Current Noise Density f = 100 kHz INP 4.2 pA/√Hz INN 47 pA/√Hz DC PERFORMANCE Input Offset Voltage −15 −4 +5 mV Input Offset Voltage Drift 14 µV/°C Input Bias Current Noninverting Input 13 23 µA Inverting Input −5 −18 µA Input Bias Current Drift, Inverting Input 10 nA/°C Open-Loop Transresistance 1.9 MΩ INPUT CHARACTERISTICS Input Resistance INP 2 MΩ Input Capacitance INP 0.75 pF Input Common-Mode Voltage Range (VICM) ±3.0 V Common-Mode Rejection Ratio VICM = ±0.5 V, ±3.0 V 57 59 dB SD PIN (SHUTDOWN) Input Voltages High (enabled) VEE + 1.1 VEE + 5 V Low (power-down) VEE VEE + 0.9 V Input Bias Current Enabled (SD = VEE + 5 V) 110 µA Power down (SD = VEE) −65 µA ON PIN (RESET AND SHORT-CIRCUIT PROTECTION) Input Voltages High (power-down) VEE + 1.8 VEE + 5 V Low (enabled) VEE VEE + 1.3 V Input Bias Current Enabled (ON = VEE) −75 µA Power down (ON = VEE + 5 V) 100 µA Rev. 0 | Page 4 of 8 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ±20 V SUPPLY ±5 V SUPPLY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS OUTLINE DIMENSIONS DIE SPECIFICATIONS AND ASSEMBLY RECOMMENDATIONS ORDERING GUIDE