Datasheet LTC4418 (Linear Technology) - 7

HerstellerLinear Technology
BeschreibungDual Channel Prioritized PowerPath Controller
Seiten / Seite30 / 7 — PIN FUNCTIONS TMR (Pin 1):. INTVCC (Pin 10):. UV1, UV2 (Pins 2, 4):. G1, …
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DokumentenspracheEnglisch

PIN FUNCTIONS TMR (Pin 1):. INTVCC (Pin 10):. UV1, UV2 (Pins 2, 4):. G1, G2 (Pins 13, 11):. VS1, VS2 (Pins 14, 12):

PIN FUNCTIONS TMR (Pin 1): INTVCC (Pin 10): UV1, UV2 (Pins 2, 4): G1, G2 (Pins 13, 11): VS1, VS2 (Pins 14, 12):

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LTC4418
PIN FUNCTIONS TMR (Pin 1):
Validation Timer. Attach an external capacitor SHDN is above its threshold. CAS also pulls low when EN between TMR and GND of at least 100pF to set a Valida- is driven below VEN(TH). CAS can be pulled up to voltages tion Time of 16ms/nF for both channels. Connect TMR to as high as 5.5V, independent of the input supply voltages. INTVCC to set a minimum validation time of 3.5µs (Fast Leave open if not used. Mode). Do not leave open.
INTVCC (Pin 10):
Internal Low Voltage Supply Decoupling
UV1, UV2 (Pins 2, 4):
Undervoltage Comparator Inputs. Output. Do not connect an external load current to INTVCC. Falling voltages below 1V (VTH) trigger an undervoltage Connect a 0.1µF capacitor from this pin to GND. event, invalidating the respective input supply channel.
G1, G2 (Pins 13, 11):
P-Channel MOSFET Gate Drive Connect UV1 and UV2 to a resistive divider between the Outputs. G1 and G2 are used to control external P-channel respective V1 and V2 and ground to achieve the desired MOSFETs. When driven low, G1 and G2 are clamped 6.2V undervoltage threshold. The comparator hysteresis can (∆V be set internally to V G) below their corresponding VS1 and VS2. Connect HYS(INT) or set externally via the HYS G1 and G2 to external P-channel MOSFET gate pins. pin. Connect unused pins to ground.
VS1, VS2 (Pins 14, 12):
External P-Channel MOSFET
OV1, OV2 (Pins 3, 5):
Overvoltage Comparator Inputs. Common Source Connection. The gate drivers use VS1 Rising voltages above 1V (VTH) signal an overvoltage and VS2 to monitor the common source connection of the event, invalidating the respective input supply channel. external P-channel MOSFETs. Connect VS1 and VS2 to the Connect OV1 and OV2 to an external resistive divider from respective common source connection of the P-channel its respective V1 and V2 to achieve the desired overvoltage MOSFETs. Connect to ground when channel is not used. threshold. The comparator hysteresis can be set internally See Applications Information section for bypass capacitor to VHYS(INT) or set externally via the HYS pin. Connect recommendations. unused pins to ground.
V VALID1, VALID2 (Pins 6, 7):
Valid Channel Indicator Out-
OUT (Pin 15):
Output Voltage Supply and Sense. VOUT is an output voltage sense pin used to prevent any input puts. VALID1 and VALID2 are 40V rated, open drain outputs supply from connecting to the output if the output voltage that pull low when the respective V1 and V2 are within the is not below the input supply voltage by at least 125mV OV/UV window for at least the configured validation time (V and release when the respective V1 and V2 are outside REV). During normal operation, VOUT powers most of the internal circuitry when its voltage exceeds 2.475V. the OV/UV window. Connect a resistor between VALID1 See Applications Information section for bypass capacitor and VALID2 and a desired supply, which may be V1, V2 or recommendations. VOUT, to provide the pull-up. Leave open when not used.
V2 (Pin 16):
Lower Priority Input Supply. When V2 is
GND (Pin 8, Exposed Pad Pin 21):
Device Ground. Exposed within its user defined OV/UV window for the configured pad may be left open or connected to device ground. validation time, it is connected to VOUT via its external
CAS (Pin 9):
Cascade Output. Digital output used for cas- P-channel MOSFETs only if V1 does not meet its OV/UV cading multiple LTC4418s and/or LTC4417s. Connect CAS requirements. Connect V2 to ground when channel is not to EN of another LTC4417/LTC4418 to increase the number used. See Applications Information for bypass capacitor of multiplexed input supplies. CAS is pulled up to INTVCC recommendations. by an internal 20µA current source (ICAS) to indicate when
V1 (Pin 17):
Higher Priority Input Supply. When V1 is all inputs are invalid, the external P-channel MOSFETs are within its user defined OV/UV window for the configured determined to be off, and EN is above VEN(TH). CAS also validation time, it is connected to V pulls high when SHDN is driven below V OUT via its external SHDN(TH). CAS P-channel MOSFETs. See Applications Information for is pulled low when any input supply is within the OV/UV bypass capacitor recommendations. window for at least the configured validation time and 4418f For more information www.linear.com/LTC4418 7 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts