Datasheet LTC6902 (Analog Devices) - 9

LTC6902
U THEORY OF OPERATIO
divider goes through further division. In addition to fur- is
not
simply OUT1 routed through a standard logic ther division, the duty cycle of the output depends on the inverter. This would lead to substantial delay for OUT2’s multiphase mode selected. Figure 4 shows the waveform transitions from OUT1’s transitions. OUT1 and OUT2 are at each output for 2-, 3- and 4-phase modes. created by a delay matched inverting circuit. Apart from the basic inversion, the delay matching is determined by
2-Phase Mode
analog circuit parameters. With this type of design, OUT1 In 2-phase mode, all outputs are nominally 50% duty and OUT2 transitions are typically within 100ps. OUT3 and cycle. OUT1 and OUT2 are 180 degrees out of phase. OUT4 are replications of OUT1 and OUT2 respectively. Stated differently, OUT2 is OUT1 inverted. However, OUT2 Since the two phases are generated via delay matched inverters, there is not any further division and the param- 10000 eter M in the frequency setting equation is 1 (M = 1). 1000
3-Phase Mode
÷100 ÷10 ÷1 ) In 3-phase mode, OUT1, OUT2 and OUT3 are active and all Ω (k 100 three outputs have a 33.3% duty cycle. OUT4 is not active SETR and is at a logic low state. The three active outputs are all 120 degrees out of phase. OUT2 lags OUT1 by 120 degrees 10 and OUT3 lags OUT2 by 120 degrees. The signals are generated by a shift register. The output frequency is the 1 programmable divider’s output further divided 3 (M = 3). 1k 10k 100k 1M 10M 100M DESIRED OUTPUT FREQUENCY (Hz) 69012 F03
4-Phase Mode
In 4-phase mode, all outputs have a 50% duty cycle. The
Figure 3. RSET vs Desired Output Frequency (PH = GND, 2-Phase, M = 1)
outputs are all 90 degrees out of phase. OUT2 lags OUT1 2-PHASE, PH = GND M = 1 OUT1 DUTY CYCLE = 50% OUT2 OUT3 OUT4 3-PHASE, PH = OPEN OUT1 M = 3 DUTY CYCLE = 33% OUT2 (OUT4 = LOGIC LOW) OUT3 OUT4 4-PHASE, PH = V+ M = 4 OUT1 DUTY CYCLE = 50% OUT2 OUT3 OUT4 69012 F04
Figure 4. Mulitphase Output Waveforms
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