Datasheet AD8313 (Analog Devices) - 5

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AD8313 Data Sheet Parameter Test Conditions/Comments Min2 Typ Max2 Unit
2.5 GHz7 Nominal conditions ±3 dB Dynamic Range 48 66 dB Range Center –34 dBm ±1 dB Dynamic Range 46 dB Slope 16 20 25 mV/dB Intercept –111 –92 –72 dBm 2.7 V ≤ VS ≤ 5.5 V, –40°C ≤ T ≤ +85°C ±3 dB Dynamic Range 47 68 dB Range Center –34.5 dBm ±1 dB Dynamic Range 46 dB Slope 14.5 20 25 mV/dB Intercept –128 –92 –56 dBm Temperature Sensitivity PIN =–10 dBm –0.040 dB/°C 3.5 GHz5 Nominal conditions ±3 dB Dynamic Range 43 dB ±1 dB Dynamic Range 35 dB Slope 24 mV/dB Intercept –65 dBm CONTROL MODE Controller Sensitivity f = 900 MHz 23 V/dB Low Frequency Gain VSET to VOUT8 84 dB Open-Loop Corner Frequency VSET to VOUT8 700 Hz Open-Loop Slew Rate f = 900 MHz 2.5 V/µs VSET Delay Time 150 ns VOUT INTERFACE Current Drive Capability Source Current 400 µA Sink Current 10 mA Minimum Output Voltage Open-loop 50 mV Maximum Output Voltage Open-loop VPOS – 0.1 V Output Noise Spectral Density PIN = –60 dBm, fSPOT = 100 Hz 2.0 µV/√Hz PIN = –60 dBm, fSPOT = 10 MHz 1.3 µV/√Hz Small Signal Response Time PIN = –60 dBm to –57 dBm, 10% to 90% 40 60 ns Large Signal Response Time PIN = No signal to 0 dBm; settled to 0.5 dB 110 160 ns VSET INTERFACE Input Voltage Range 0 VPOS V Input Impedance 18||1 kΩ||pF4 POWER-DOWN INTERFACE PWDN Threshold VPOS/2 V Power-Up Response Time Time delay following high to low transition 1.8 µs until device meets full specifications. PWDN Input Bias Current PWDN = 0 V 5 µA PWDN = VS <1 µA Rev. E | Page 4 of 24 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Description Typical Performance Characteristics Circuit Description Interfaces Power-Down Interface, PWDN Signal Inputs, INHI, INLO Logarithmic/Error Output, VOUT Setpoint Interface, VSET Applications Information Basic Connections for Log (RSSI) Mode Operating in Controller Mode Input Coupling Narrow-Band LC Matching Example at 100 MHz Adjusting the Log Slope Increasing Output Current Effect of Waveform Type on Intercept Evaluation Board Schematic and Layout General Operation Using the AD8009 Operational Amplifier Varying the Logarithmic Slope Operating in Controller Mode RF Burst Response Outline Dimensions Ordering Guide