Datasheet AD558 (Analog Devices) - 5

HerstellerAnalog Devices
BeschreibungDACPORT Low Cost, Complete µP-Compatible 8-Bit DAC
Seiten / Seite10 / 5 — AD558. CIRCUIT DESCRIPTION. CHIP AVAILABILITY. Input Logic Coding. …
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AD558. CIRCUIT DESCRIPTION. CHIP AVAILABILITY. Input Logic Coding. Digital Input Code. Output Voltage. Binary. Hexadecimal Decimal

AD558 CIRCUIT DESCRIPTION CHIP AVAILABILITY Input Logic Coding Digital Input Code Output Voltage Binary Hexadecimal Decimal

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AD558 CIRCUIT DESCRIPTION CHIP AVAILABILITY
The AD558 consists of four major functional blocks, fabricated The AD558 is available in laser-trimmed, passivated chip form. on a single monolithic chip (see Figure 2). The main D-to-A AD558J and AD558T chips are available. Consult the factory converter section uses eight equally-weighted laser-trimmed for details. current sources switched into a silicon-chromium thin-film
Input Logic Coding
R/2R resistor ladder network to give a direct but unbuffered 0 mV to 400 mV output range. The transistors that form the
Digital Input Code Output Voltage
DAC switches are PNPs; this allows direct positive-voltage logic
Binary Hexadecimal Decimal 2.56 V Range 10.000 V Range
interface and a zero-based output range. 0000 0000 00 0 0 0 0000 0001 01 1 0.010 V 0.039 V
DIGITAL INPUT DATA CONTROL
0000 0010 02 2 0.020 V 0.078 V
INPUTS LSB MSB
0000 1111 0F 15 0.150 V 0.586 V 0001 0000 10 16 0.160 V 0.625 V
CS CE +V DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 CC GND GND
0111 1111 7F 127 1.270 V 4.961 V 1000 0000 80 128 1.280 V 5.000 V
I2L CONTROL I2L LATCHES
1100 0000 C0 192 1.920 V 7.500 V
LOGIC
1111 1111 FF 255 2.55 V 9.961 V
BAND- OUTPUT GAP 8-BIT VOLTAGE-SWITCHING REFERENCE AMP CONNECTING THE AD558 D-TO-A CONVERTER VOUT CONTROL
The AD558 has been configured for ease of application. All ref-
AMP VOUT SENSE
erence, output amplifier and logic connections are made inter-
V
nally. In addition, all calibration trims are performed at the
OUT SELECT
factory assuring specified accuracy without user trims. The only connection decision that must be made by the user is a single jumper to select output voltage range. Clean circuit board lay- Figure 2. AD558 Functional Block Diagram out is facilitated by isolating all digital bit inputs on one side of The high speed output buffer amplifier is operated in the non- the package; analog outputs are on the opposite side. inverting mode with gain determined by the user-connections Figure 3 shows the two alternative output range connections. at the output range select pin. The gain-setting application The 0 V to 2.56 V range may be selected for use with any power resistors are thin-film laser-trimmed to match and track the supply between +4.5 V and +16.5 V. The 0 V to 10 V range DAC resistors and to assure precise initial calibration of the two requires a power supply of +11.4 V to +16.5 V. output ranges, 0 V to 2.56 V and 0 V to 10 V. The amplifier output stage is an NPN transistor with passive pull-down for zero-based output capability with a single power supply. The
OUTPUT OUTPUT AMP AMP
internal precision voltage reference is of the patented bandgap
V V
type. This design produces a reference voltage of 1.2 volts and
16 OUT 16 OUT
thus, unlike 6.3 volt temperature compensated Zeners, may be
15 VOUT SENSE 15 VOUT SENSE
operated from a single, low voltage logic power supply. The microprocessor interface logic consists of an 8-bit data latch and
14 VOUT SELECT 14 VOUT SELECT
control circuitry. Low power, small geometry and high speed are advantages of the I2L design as applied to this section. I2L is
13 GND 13 GND
bipolar process compatible so that the performance of the ana- log sections need not be compromised to provide on-chip logic a. 0 V to 2.56 V Output Range b. 0 V to 10 V Output Range capabilities. The control logic allows the latches to be operated Figure 3. Connection Diagrams from a decoded microprocessor address and write signal. If the application does not involve a µP or data bus, wiring CS and Because of its precise factory calibration, the AD558 is intended CE to ground renders the latches “transparent” for direct DAC to be operated without user trims for gain and offset; therefore no provisions have been made for such user trims. If a small in- access. crease in scale is required, however, it may be accomplished by slightly altering the effective gain of the output buffer. A
MIL-STD-883
resistor in series with V The rigors of the military/aerospace environment, temperature OUT SENSE will increase the output range. extremes, humidity, mechanical stress, etc., demand the utmost in electronic circuits. The AD558, with the inherent reliability For example if a 0 V to 10.24 V output range is desired (40 mV of integrated circuit construction, was designed with these ap- = 1 LSB), a nominal resistance of 850 Ω is required. It must be plications in mind. The hermetically-sealed, low profile DIP remembered that, although the internal resistors all ratio- package takes up a fraction of the space required by equivalent match and track, the absolute tolerance of these resistors is modular designs and protects the chip from hazardous environ- typically ± 20% and the absolute TC is typically –50 ppm/°C ments. To further ensure reliability, military temperature range (0 to –100 ppm/°C). That must be considered when rescaling is AD558 grades S and T are available screened to MIL-STD-883. performed. Figure 4 shows the recommended circuitry for a For more complete data sheet information consult the Analog full-scale output range of 10.24 volts. Internal resistance values Devices’ Military Databook. shown are nominal. –4– REV. B