Datasheet AD5383 (Analog Devices) - 4

Data Sheet AD5383 REVISION HISTORY 5/14—Rev. C to Rev. D
Changes to Table 3 .. 4 Deleted ADSP-2103 .. Throughout Changes to Table 4 .. 6 Changed ADSP-2101 to ADSP-BF527 ... Throughout Changes to Table 5 .. 7 Deleted Table 1; Renumbered Sequentially ... 3 Changes to Table 6 .. 8 Changes to General Description Section ... 4 Changes to Table 9 .. 13 Changes to Table 1 .. 5 Changes to Figure 10, Figure 11, and Figure 14 .. 18 Changes to Table 2 .. 7 Changes to Figure 16, Figure 17, Figure 18, and Figure 20 ... 19 Changes to Table 4 .. 9 Changes to Table 6 .. 12
4/10—Rev. A to Rev. B
Changes to Soft Reset Section ... 23 Changes to Table 18 .. 24 Changes to Reset Function Section .. 26 Updated Outline Dimensions .. 37 Changes to Figure 38 .. 33 Changes to Ordering Guide ... 37 Added Power Supply Sequencing Section, Table 18, Figure 39, and Figure 40; Renumbered Sequentially .. 34
3/05—Rev. 0 to Rev. A
Added Figure 41 and Figure 42 ... 35 Changes to Table 1 .. 3 Changes to Table 3 .. 6
10/12—Rev. B to Rev. C
Change to Table 5 .. 7 Changes to Product Title and Features Section .. 1 Change to Table 18 .. 24 Changes to General Description Section and Table 1; Deleted Table 2, Renumbered Sequentially .. 3
5/04—Revision 0: Initial Version
Rev. D | Page 3 of 40 Document Outline Features Integrated Functions Applications Functional Block Diagram Table of Contents Revision History General Description Specifications AD5383-5 Specifications AD5383-3 Specifications AC Characteristics9F Timing Characteristics Serial Interface Timing I2C Serial Interface Timing Parallel Interface Timing Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Terminology Typical Performance Characteristics Functional Description DAC Architecture—General Data Decoding On-Chip Special Function Registers (SFR) SFR Commands NOP (No Operation) Write CLR Code Soft CLR Soft Power-Down Soft Power-Up Soft RESET Control Register Write/Read Channel Monitor Function Hardware Functions Reset Function Asynchronous Clear Function BUSY\ and LDAC\ Functions FIFO Operation in Parallel Mode Power-On Reset Power-Down Interfaces DSP-, SPI-, MICROWIRE-Compatible Serial Interfaces Standalone Mode Daisy-Chain Mode Readback Mode I2C Serial Interface I2C Data Transfer START and STOP Conditions Repeated START Conditions Acknowledge Bit (ACK) AD5383 Slave Addresses Write Operation 4-Byte Mode 3-Byte Mode 2-Byte Mode Parallel Interface CS\ Pin WR\ Pin REG0, REG1 Pins Pins A4 to A0 Pins DB11 to DB0 Microprocessor Interfacing Parallel Interface AD5383 to MC68HC11 AD5383 to PIC16C6x/7x AD5383 to 8051 AD5383 to ADSP-BF527 Applications Information Power Supply Decoupling Power Supply Sequencing Typical Configuration Circuit Channel Monitor Function Toggle Mode Function Thermal Monitor Function Optical Attenuators Utilizing the FIFO Outline Dimensions Ordering Guide