Datasheet AD7703 (Analog Devices) - 3

AD7703–SPECIFICATIONS (TA = 25
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C; AVDD = DVDD = +5 V; AVSS = DVSS = –5 V; VREF = +2.5 V; fCLKIN = 4.096 MHz; BP/UP = +5 V; MODE = +5 V; AIN Source Resistance = 1 k
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1 with 1 nF to AGND at AIN; unless otherwise noted.) Parameter A/S Version2 B Version2 C Version2 Unit Test Conditions/Comments
STATIC PERFORMANCE Resolution 20 20 20 Bits Integral Nonlinearity, TMIN to TMAX ±0.0015 ±0.0007 ±0.0003 % FSR typ 25°C ±0.003 ±0.0015 ±0.0008 % FSR max TMIN to TMAX ±0.003 ±0.0015 ±0.0012 % FSR max Differential Nonlinearity, TMIN to TMAX ±0.5 ±0.5 ±0.5 LSB typ Guaranteed No Missing Codes Positive Full-Scale Error3 ±4 ±4 ±4 LSB typ ±16 ±16 ±16 LSB max Full-Scale Drift4 ±19/±37 ±19 ±19 LSB typ Unipolar Offset Error3 ±4 ±4 ±4 LSB typ ±16 ±16 ±16 LSB max Unipolar Offset Drift4 ±26 ±26 ±26 LSB typ Temp Range: 0°C to +70°C ±67 +48/–400 ±67 ±67 LSB typ Specified Temp Range Bipolar Zero Error3 ±4 ±4 ±4 LSB typ ±16 ±16 ±16 LSB max Bipolar Zero Drift4 ±13 ±13 ±13 LSB typ Temp Range: 0°C to +70°C ±34 +24/–200 ±34 ±34 LSB typ Specified Temp Range Bipolar Negative Full-Scale Errors3 ±8 ±8 ±8 LSB typ ±32 ±32 ±32 LSB max Bipolar Negative Full-Scale Drift4 ±10/±20 ±10 ±10 LSB typ Noise (Referred to Output) 1.6 1.6 1.6 LSB rms typ DYNAMIC PERFORMANCE Sampling Frequency, fS fCLKIN/256 fCLKIN/256 fCLKIN/256 Hz Output Update Rate, fOUT fCLKIN/1024 fCLKIN/1024 fCLKIN/1024 Hz Filter Corner Frequency, f–3 dB fCLKIN/409,600 fCLKIN/409,600 fCLKIN/409,600 Hz Settling Time to ±0.0007% FS 507904/fCLKIN 507904/fCLKIN 507904/fCLKIN sec For Full-Scale Input Step SYSTEM CALIBRATION Positive Full-Scale Calibration Range VREF + 0.1 VREF + 0.1 VREF + 0.1 V max System calibration applies to Positive Full-Scale Overrange VREF + 0.1 VREF + 0.1 VREF + 0.1 V max unipolar and bipolar ranges. Negative Full-Scale Overrange –(VREF + 0.1) –(VREF + 0.1) –(VREF + 0.1) V max After calibration, if AIN > VREF, Maximum Offset Calibration Ranges5, 6 the device will output all 1s. Unipolar Input Range –(VREF + 0.1) –(VREF + 0.1) –(VREF + 0.1) V max If AIN < 0 (unipolar) or –VREF Bipolar Input Range –0.4 VREF to +0.4 VREF –0.4 VREF to +0.4 VREF –0.4 VREF to +0.4 VREF V max (bipolar), the device will Input Span7 0.8 VREF 0.8 VREF 0.8 VREF V min output all 0s. 2 VREF + 0.2 2 VREF + 0.2 2 VREF + 0.2 V max ANALOG INPUT Unipolar Input Range 0 to 2.5 0 to 2.5 0 to 2.5 V Bipolar Input Range ±2.5 ±2.5 ±2.5 V Input Capacitance 20 20 20 pF typ Input Bias Current1 1 1 1 nA typ LOGIC INPUTS All Inputs Except CLKIN VINL, Input Low Voltage 0.8 0.8 0.8 V max VINH, Input High Voltage 2.0 2.0 2.0 V min CLKIN VINL, Input Low Voltage 0.8 0.8 0.8 V max VINH, Input High Voltage 3.5 3.5 3.5 V min IIN, Input Current 10 10 10 µA max LOGIC OUTPUTS VOL, Output Low Voltage 0.4 0.4 0.4 V max ISINK = 1.6 mA VOH, Output High Voltage DVDD – 1 DVDD – 1 DVDD – 1 V min ISOURCE = 100 µA Floating State Leakage Current ±10 ±10 ±10 µA max Floating State Output Capacitance 9 9 9 pF typ POWER REQUIREMENTS Power Supply Voltages Analog Positive Supply (AVDD) 4.5/5.5 4.5/5.5 4.5/5.5 V min/V max For Specified Performance Digital Positive Supply (DVDD) 4.5/AVDD 4.5/AVDD 4.5/AVDD V min/V max Analog Negative Supply (AVSS) –4.5/–5.5 –4.5/–5.5 –4.5/–5.5 V min/V max Digital Negative Supply (DVSS) –4.5/–5.5 –4.5/–5.5 –4.5/–5.5 V min/V max Calibration Memory Retention Power Supply Voltage 2.0 2.0 2.0 V min –2– REV. E Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE TIMING CHARACTERISTICS DEFINITION OF TERMS Linearity Error Differential Linearity Error Positive Full-Scale Error Unipolar Offset Error Bipolar Zero Error Bipolar Negative Full-Scale Error Positive Full-Scale Overrange Negative Full-Scale Overrange Offset Calibration Range Full-Scale Calibration Range Input Span PIN CONFIGURATION DIP, CERDIP, SOIC PIN FUNCTION DESCRIPTIONS GENERAL DESCRIPTION THEORY OF OPERATION DIGITAL FILTERING FILTER CHARACTERISTICS USING THE AD7703 SYSTEM DESIGN CONSIDERATIONS CLOCKING ANALOG INPUT RANGES ACCURACY AUTOCALIBRATION Initiating Calibration Span and Offset Limits POWER-UP AND CALIBRATION Drift Considerations INPUT SIGNAL CONDITIONING Source Resistance Antialias Considerations VOLTAGE REFERENCE CONNECTIONS POWER SUPPLIES AND GROUNDING SLEEP MODE DIGITAL INTERFACE Synchronous Self-Clocking Mode (SSC) Synchronous External Clock Mode (SEC) DIGITAL NOISE AND OUTPUT LOADING OUTLINE DIMENSIONS REVISION HISTORY