Datasheet AD7896 (Analog Devices) - 6

AD7896 PIN CONFIGURATION V 1 8 I N BUSY V 2 AD7896 7 CONVST DD TOP VIEW AGND 3 (Not to Scale) 6 DGND SCLK 4 5 SDATA PIN FUNCTION DESCRIPTIONS Pin No. Mnemonic Description
1 VIN Analog Input. The analog input range is 0 V to VDD. 2 VDD Positive supply voltage, 2.7 V to 5.5 V. 3 AGND Analog Ground. Ground reference for track-and-hold, comparator, and DAC. 4 SCLK Serial Clock Input. An external serial clock is applied to this input to obtain serial data from the AD7896. A new serial data bit is clocked out on the falling edge of this serial clock. Data is guaranteed valid for 10 ns after this falling edge so data can be accepted on the falling edge when a fast serial clock is used. The serial clock input should be taken low at the end of the serial data transmission. 5 SDATA Serial Data Output. Serial data from the AD7896 is provided at this output. The serial data is clocked out by the falling edge of SCLK, but the data can also be read on the falling edge of the SCLK. This is possible because data bit N is valid for a specified time after the falling edge of the SCLK (data hold time) and can be read before data bit N+1 becomes valid a specified time after the falling edge of SCLK (data access time) (see Figure 4). Sixteen bits of serial data are provided with four leading zeros followed by the 12 bits of conversion data. On the 16th falling edge of SCLK, the SDATA line is held for the data hold time and then disabled (three-stated). Output data coding is straight binary. 6 DGND Digital Ground. Ground reference for digital circuitry. 7 CONVST Convert Start. Edge-triggered logic input. On the falling edge of this input, the track-and-hold goes into its hold mode and conversion is initiated. If CONVST is low at the end of conversion, the part goes into power-down mode. In this case, the rising edge of CONVST “wakes up” the part. 8 BUSY The BUSY pin is used to indicate when the part is doing a conversion. The BUSY pin goes high on the falling edge of CONVST and returns low when the conversion is complete. Rev. D –5– Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS TERMINOLOGY Relative Accuracy Differential Nonlinearity Unipolar Offset Error Positive Full-Scale Error Track-and-Hold Acquisition Time Signal-to-(Noise + Distortion) Ratio Total Harmonic Distortion Peak Harmonic or Spurious Noise Intermodulation Distortion CONVERTER DETAILS CIRCUIT DESCRIPTION Analog Input Section Track-and-Hold Section Timing and Control OPERATING MODES Mode 1 Operation (High Sampling Performance) Mode 2 Operation (Auto Sleep after Conversion) Serial Interface MICROPROCESSOR/MICROCONTROLLER INTERFACE AD7896–8051 Interface AD7896–68HC11/L11 Interface AD7896–ADSP-2103/ADSP-2105 Interface AD7896–DSP56002/L002 Interface AD7896 PERFORMANCE Linearity Noise Dynamic Performance (Mode 1 Only) Effective Number of Bits Power Considerations OUTLINE DIMENSIONS ORDERING GUIDE Revision History