Datasheet AD7861 (Analog Devices) - 5

AD7861 PIN DESCRIPTION PIN CONFIGURATION Pin Mnemonic Type Description
1 AUX0 I/P Auxiliary Input 0 2 REFIN I/P Analog Reference Input
S1 S0 REFOUT AGND REFIN AUX0 AUX1 AUX2 AUX3 VIN3 VIN2
3 AGND GND Analog Ground
6 5 4 3 2 1 44 43 42 41 40
4 REFOUT O/P Internal 2.5 Analog Reference
D0 7 PIN 1 39 NC IDENTIFIER
5 S0 I/P Aux Channel Select 0
D1 8 38 NC
6 S1 I/P Aux Channel Select 1
D2 9 37 VIN1
7 D0 O/P Data Bit 0 LSB (Tied Low)
D3 10 36 VDD
8 D1 O/P Data Bit 1
D4 11 35 AD7861 SGND
9 D2 O/P Data Bit 2
D5 12 TOP VIEW 34 DGND
10 D3 O/P Data Bit 3
(Not to Scale) D6 13 33 DGND
11 D4 O/P Data Bit 4
D7 14 32 CLK
12 D5 O/P Data Bit 5
D8 15 31 BUSY
13 D6 O/P Data Bit 6
D9 16 30 NC
14 D7 O/P Data Bit 7
D10 17 29 A0
15 D8 O/P Data Bit 8
18 19 20 21 22 23 24 25 26 27 28
16 D9 O/P Data Bit 9
DD M0 M1 CS RD A1
17 D10 O/P Data Bit 10
D11 V NC = NO CONNECT DGND DGND RESET
18 D11 O/P Data Bit 11, MSB
CONVST
19 DGND GND Logic Ground 20 DGND GND Logic Ground 21 VDD SUP +5 V Digital Supply 22 M0 I/P Conversion Mode Select 0 23 M1 I/P Conversion Mode Select 1
Pin Types Pin Types
24 CONVST I/P A/D Conversion Start 25 CS I/P Chip Select I/P = Input Pin GND = Ground Pin O/P = Output Pin SUP = Supply Pin 26 RD I/P Read Input 27 RESET I/P Chip Reset 28 A1 I/P Register Address Select 1 29 A0 I/P Register Address Select 0 30 NC NC No Connect 31 BUSY O/P Busy, Conversion in Process 32 CLK I/P External Clock Input 6.25 MHz-12.5 MHz 33–34 DGND GND Logic Ground 35 SGND GND Signal Ground 36 VDD SUP +5 V Analog Supply 37 VIN1 I/P Analog Input 1 38–39 NC NC No Connect 40 VIN2 I/P Analog Input 2 41 VIN3 I/P Analog Input 3 42 AUX3 I/P Auxiliary Input 3 43 AUX2 I/P Auxiliary Input 2 44 AUX1 I/P Auxiliary Input 1 –4– REV. B