Datasheet AD7731 (Analog Devices) - 4

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AD7731 Parameter B Version1 Units Conditions/Comments
Absolute/Common-Mode Voltage13 AGND + 1.2 V V min AVDD – 0.95 V V max Reference Input REF IN(+) – REF IN (–) Voltage +2.5 V nom HIREF Bit of Mode Register = 0 REF IN(+) – REF IN (–) Voltage +5 V nom HIREF Bit of Mode Register = 1 Reference DC Input Current 5.5 µA max HIREF Bit of Mode Register = 0 Reference DC Input Current 10 µA max HIREF Bit of Mode Register = 1 Absolute/Common-Mode Voltage14 AGND – 30 mV V min AVDD + 30 mV V max NO REF Trigger Voltage 0.3 V min NO REF Bit Active If VREF Below This Voltage 0.65 V max NO REF Bit Inactive If VREF Above This Voltage LOGIC INPUTS Input Current ±10 µA max All Inputs Except SCLK and MCLK IN VINL, Input Low Voltage 0.8 V max DVDD = +5 V VINL, Input Low Voltage 0.4 V max DVDD = +3 V VINH, Input High Voltage 2.0 V min SCLK Only (Schmitt Triggered Input) VT+ 1.4/3 V min/V max DVDD = +5 V VT+ 0.95/2.5 V min/V max DVDD = +3 V VT– 0.8/1.4 V min/V max DVDD = +5 V VT– 0.4/1.1 V min/V max DVDD = +3 V VT+ – VT– 0.4/0.85 V min/V max DVDD = +5 V VT+ – VT– 0.4/0.8 V min/V max DVDD = +3 V MCLK IN Only VINL, Input Low Voltage 0.8 V max DVDD = +5 V VINL, Input Low Voltage 0.4 V max DVDD = +3 V VINH, Input High Voltage 3.5 V min DVDD = +5 V VINH, Input High Voltage 2.5 V min DVDD = +3 V LOGIC OUTPUTS (Including MCLK OUT) VOL, Output Low Voltage 0.4 V max ISINK = 800 µA Except for MCLK OUT15. V 16 DD = +5 V VOL, Output Low Voltage 0.4 V max ISINK = 100 µA Except for MCLK OUT15. V 16 DD = +3 V VOH, Output High Voltage 4.0 V min ISOURCE = 200 µA Except for MCLK OUT15. V 16 DD = +5 V VOH, Output High Voltage DVDD – 0.6 V V min ISOURCE = 100 µA Except for MCLK OUT15. V 16 DD = +3 V Floating State Leakage Current ±10 µA max Floating State Output Capacitance3 6 pF typ TRANSDUCER BURNOUT17 AIN1(+) Current –100 nA nom AIN1(–) Current 100 nA nom Initial Tolerance @ 25°C ±10 % typ Drift 0.1 %/°C typ SYSTEM CALIBRATION Positive Full-Scale Calibration Limit18 1.05 × FS V max FS Is the Nominal Full-Scale Voltage (20 mV, 40 mV, 80 mV, 160 mV, 320 mV, 640 mV, 1.28 V) Negative Full-Scale Calibration Limit18 –1.05 × FS V max Offset Calibration Limit19 –1.05 × FS V min Input Span19 0.8 × FS V min 2.1 × FS V max POWER REQUIREMENTS Power Supply Voltages AVDD – AGND Voltage +5 V nom DVDD Voltage +2.7 to +5.25 V min to V max With AGND = 0 V Power Supply Currents External MCLK. Digital I/Ps = 0 V or DVDD AVDD Current (Normal Mode) 10.3 mA max DVDD Current (Normal Mode) 1.7 mA max DVDD of 2.7 V to 3.3 V DVDD Current (Normal Mode) 3.2 mA max DVDD of 4.75 V to 5.25 V AVDD + DVDD Current (Standby Mode) 25 µA max Typically 10 µA. External MCLK IN = 0 V or DVDD Power Dissipation AVDD = DVDD = +5 V. Digital I/Ps = 0 V or DVDD Normal Mode 67.5 mW max Standby Mode 125 µW max Typically 50 µW. External MCLK IN = 0 V or DVDD REV. 0 REV. A –3– Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM AD7731-SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS Ordering Guide ESD Caution PIN CONFIGURATION Pin Function Descriptions TERMINOLOGY OUTPUT NOISE AND RESOLUTION SPECIFICATION Output Noise (CHP = 0, SKIP= 1) Output Noise (CHP = 1, SKIP = 0) ON-CHIP REGISTERS Communications Register (RS2-RS0 = 0, 0, 0) Status Register (RS2-RS0 = 0, 0, 0); Power-On/Reset Status: CX Hex Data Register (RS2-RS0 = 0, 0, 1); Power On/Reset Status: 000000 Hex Mode Register (RS2-RS0 = 0, 1, 0); Power-On/Reset Status: 0174 Hex Filter Register (RS2-RS0 = 0, 1, 1); Power-On/Reset Status: 2002 Hex Offset Calibration Register (RS2-RS0 = 1, 0, 1) Gain Calibration Register (RS2-RS0 = 1, 1, 0) Test Register (RS2-RS0 = 1, 1, 1); Power On/Reset Status: 000000 Hex READING FROM AND WRITING TO THE ON-CHIP REGISTERS CALIBRATION OPERATION SUMMARY CIRCUIT DESCRIPTION ANALOG INPUT Analog Input Channels Buffered Inputs Analog Input Ranges Programmable Gain Amplifier Bipolar/Unipolar Inputs Burnout Currents REFERENCE INPUT Reference Detect SIGMA-DELTA MODULATOR DIGITAL FILTERING Filter Architecture First State Filter/SKIP Mode Enabled (SKIP =1) Nonchop Mode (SKIP =1, CHP = 0) Chop Mode (SKIP = 1, CHP =1) Second Stage Filter Normal FIR Operation (SKIP = 0) Chop Mode (SKIP = 0, CHP =1) Nonchop Mode (SKIP = 1, CHP = 0) FASTStep Mode (SKIP = 0, FAST = 1) CALIBRATION Internal Zero-Scale Calibration Internal Full-Scale Calibration System Zero-Scale Calibration System Full-Scale Calibration Span and Offset Limits Power-Up and Calibration Drift Considerations USING THE AD7731 Clocking and Oscillator Circuit System Synchronization Single-Shot Conversions Reset Input Standby Mode Digital Outputs POWER SUPPLIES Grounding and Layout Evaluting the AD7731 Performance SERIAL INTERFACE Write Operation Read Operation CONFIGURING THE AD7731 MICROCOMPUTER/MICROPROCESSOR INTERFACING AD7731 to 68HC11 Interface AD7731 to 8051 Interface AD7731 to ADSP-2103/ADSP-2105 Interface APPLICATIONS Data Acquisition Programmable Logic Controllers Pressure Measurement Temperature Measurement Bipolar Input Signals PAGE INDEX TABLE INDEX OUTLINE DIMENSIONS