Datasheet AD7731 (Analog Devices) - 3
| Hersteller | Analog Devices |
| Beschreibung | Low Noise, High Throughput 24-Bit Sigma-Delta ADC |
| Seiten / Seite | 45 / 3 — AD7731–SPECIFICATIONS(AVDD = +5 V, DVDD = +3 V or +5 V; REF IN(+) = +2.5 … |
| Revision | A |
| Dateiformat / Größe | PDF / 862 Kb |
| Dokumentensprache | Englisch |
AD7731–SPECIFICATIONS(AVDD = +5 V, DVDD = +3 V or +5 V; REF IN(+) = +2.5 V; REF IN(–) = AGND; AGND =
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AD7731–SPECIFICATIONS(AVDD = +5 V, DVDD = +3 V or +5 V; REF IN(+) = +2.5 V; REF IN(–) = AGND; AGND = DGND = 0 V; fCLK IN = 4.9152 MHz. All specifications TMIN to TMAX unless otherwise noted.) Parameter B Version1 Units Conditions/Comments
STATIC PERFORMANCE (CHP = 0) No Missing Codes2 24 Bits min SKIP = 03 Output Noise and Update Rates2 See Tables I and II Integral Nonlinearity 15 ppm of FSR max Offset Error2 See Note 4 Offset Error and Offset Drift Refer to Both Offset Drift vs. Temperature2 0.5 µV/°C typ Input Range = 20 mV, 40 mV, 80 mV, 160 mV 1/2/5 µV/°C typ Input Range = 320 mV/640 mV/1.28 V Offset Drift vs. Time5 2.5 µV/1000 Hr Positive Full-Scale Error2, 6 See Note 4 Positive Full-Scale Drift vs. Temp2, 7, 8 0.6 µV/°C typ Input Range = 20 mV, 40 mV, 80 mV, 160 mV 1.5/3/6 µV/°C typ Input Range = 320 mV/640 mV/1.28 V Positive Full-Scale Drift vs. Time5 3 µV/1000 Hr Gain Error2, 9 See Note 4 Gain Drift vs. Temperature2, 7, 10 2 ppm/°C typ Gain Drift vs. Time5 10 ppm/1000 Hr Bipolar Negative Full-Scale Error2 See Note 4 Negative Full-Scale Drift vs. Temp2, 7 1 µV/°C typ Power Supply Rejection11 90 dB typ Input Range = 20 mV Power Supply Rejection11 60 dB typ Input Range = 1.28 V Common-Mode Rejection (CMR)11 On AIN 95 dB typ At DC. Input Range = 20 mV On AIN 85 dB typ At DC. Input Range = 1.28 V On REF IN 120 dB typ Analog Input DC Bias Current2 60 nA max Analog Input DC Bias Current Drift2 150 pA/°C typ Analog Input DC Offset Current2 30 nA max Analog Input DC Offset Current Drift2 100 pA/°C typ STATIC PERFORMANCE (CHP = 1)2 No Missing Codes 24 Bits min Output Noise and Update Rates See Tables III and IV Integral Nonlinearity 15 ppm of FSR max Offset Error See Note 4 Offset Error and Offset Drift Refer to Both Offset Drift vs. Temperature 5 nV/°C typ Unipolar Offset and Bipolar Zero Errors Offset Drift vs. Time5 25 nV/1000 Hr typ Positive Full-Scale Error6 See Note 4 Positive Full-Scale Drift vs. Temp7, 8 2 ppm of FS/°C max Positive Full-Scale Drift vs. Time5 10 ppm of FS/1000 Hr Gain Error9 See Note 4 Gain Drift vs. Temperature7, 10 2 ppm/°C max Gain Drift vs. Time5 10 ppm/1000 Hr Bipolar Negative Full-Scale Error See Note 4 Negative Full-Scale Drift vs. Temp 2 ppm of FS/°C max Power Supply Rejection11 110 dB typ Input Range = 20 mV Power Supply Rejection11 85 dB typ Input Range = 1.28 V Common-Mode Rejection (CMR)11 On AIN 110 dB typ At DC. Input Range = 20 mV On AIN 85 dB typ At DC. Input Range = 1.28 V On REF IN 120 dB typ Analog Input DC Bias Current 50 nA max Analog Input DC Bias Current Drift 100 pA/°C typ Analog Input DC Offset Current 10 nA max Analog Input DC Offset Current Drift 50 pA/°C typ ANALOG INPUTS/REFERENCE INPUTS Normal Mode 50 Hz/60 Hz Rejection2 88 dB min 50 Hz/60 Hz ± 1 Hz. SKIP = 0 Common-Mode 50 Hz/60 Hz Rejection2 120 dB min 50 Hz/60 Hz ± 1 Hz. SKIP = 0 Analog Inputs Differential Input Voltage Ranges12 Assuming 2.5 V or 5 V Reference with HIREF Bit Set Appropriately 0 to +20 or ± 20 mV nom RN2, RN1, RN0 of Mode Register = 0, 0, 1 0 to +40 or ± 40 mV nom RN2, RN1, RN0 of Mode Register = 0, 1, 0 0 to +80 or ± 80 mV nom RN2, RN1, RN0 of Mode Register = 0, 1, 1 0 to +160 or ± 160 mV nom RN2, RN1, RN0 of Mode Register = 1, 0, 0 0 to +320 or ± 320 mV nom RN2, RN1, RN0 of Mode Register = 1, 0, 1 0 to +640 or ± 640 mV nom RN2, RN1, RN0 of Mode Register = 1, 1, 0 0 to +1.28 or ± 1.28 V nom RN2, RN1, RN0 of Mode Register = 1, 1, 1 –2– REV. 0 REV. A Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM AD7731-SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS Ordering Guide ESD Caution PIN CONFIGURATION Pin Function Descriptions TERMINOLOGY OUTPUT NOISE AND RESOLUTION SPECIFICATION Output Noise (CHP = 0, SKIP= 1) Output Noise (CHP = 1, SKIP = 0) ON-CHIP REGISTERS Communications Register (RS2-RS0 = 0, 0, 0) Status Register (RS2-RS0 = 0, 0, 0); Power-On/Reset Status: CX Hex Data Register (RS2-RS0 = 0, 0, 1); Power On/Reset Status: 000000 Hex Mode Register (RS2-RS0 = 0, 1, 0); Power-On/Reset Status: 0174 Hex Filter Register (RS2-RS0 = 0, 1, 1); Power-On/Reset Status: 2002 Hex Offset Calibration Register (RS2-RS0 = 1, 0, 1) Gain Calibration Register (RS2-RS0 = 1, 1, 0) Test Register (RS2-RS0 = 1, 1, 1); Power On/Reset Status: 000000 Hex READING FROM AND WRITING TO THE ON-CHIP REGISTERS CALIBRATION OPERATION SUMMARY CIRCUIT DESCRIPTION ANALOG INPUT Analog Input Channels Buffered Inputs Analog Input Ranges Programmable Gain Amplifier Bipolar/Unipolar Inputs Burnout Currents REFERENCE INPUT Reference Detect SIGMA-DELTA MODULATOR DIGITAL FILTERING Filter Architecture First State Filter/SKIP Mode Enabled (SKIP =1) Nonchop Mode (SKIP =1, CHP = 0) Chop Mode (SKIP = 1, CHP =1) Second Stage Filter Normal FIR Operation (SKIP = 0) Chop Mode (SKIP = 0, CHP =1) Nonchop Mode (SKIP = 1, CHP = 0) FASTStep Mode (SKIP = 0, FAST = 1) CALIBRATION Internal Zero-Scale Calibration Internal Full-Scale Calibration System Zero-Scale Calibration System Full-Scale Calibration Span and Offset Limits Power-Up and Calibration Drift Considerations USING THE AD7731 Clocking and Oscillator Circuit System Synchronization Single-Shot Conversions Reset Input Standby Mode Digital Outputs POWER SUPPLIES Grounding and Layout Evaluting the AD7731 Performance SERIAL INTERFACE Write Operation Read Operation CONFIGURING THE AD7731 MICROCOMPUTER/MICROPROCESSOR INTERFACING AD7731 to 68HC11 Interface AD7731 to 8051 Interface AD7731 to ADSP-2103/ADSP-2105 Interface APPLICATIONS Data Acquisition Programmable Logic Controllers Pressure Measurement Temperature Measurement Bipolar Input Signals PAGE INDEX TABLE INDEX OUTLINE DIMENSIONS
AD7731–SPECIFICATIONS(AVDD = +5 V, DVDD = +3 V or +5 V; REF IN(+) = +2.5 V; REF IN(–) = AGND; AGND = DGND = 0 V; fCLK IN = 4.9152 MHz. All specifications TMIN to TMAX unless otherwise noted.) Parameter B Version1 Units Conditions/Comments
STATIC PERFORMANCE (CHP = 0) No Missing Codes2 24 Bits min SKIP = 03 Output Noise and Update Rates2 See Tables I and II Integral Nonlinearity 15 ppm of FSR max Offset Error2 See Note 4 Offset Error and Offset Drift Refer to Both Offset Drift vs. Temperature2 0.5 µV/°C typ Input Range = 20 mV, 40 mV, 80 mV, 160 mV 1/2/5 µV/°C typ Input Range = 320 mV/640 mV/1.28 V Offset Drift vs. Time5 2.5 µV/1000 Hr Positive Full-Scale Error2, 6 See Note 4 Positive Full-Scale Drift vs. Temp2, 7, 8 0.6 µV/°C typ Input Range = 20 mV, 40 mV, 80 mV, 160 mV 1.5/3/6 µV/°C typ Input Range = 320 mV/640 mV/1.28 V Positive Full-Scale Drift vs. Time5 3 µV/1000 Hr Gain Error2, 9 See Note 4 Gain Drift vs. Temperature2, 7, 10 2 ppm/°C typ Gain Drift vs. Time5 10 ppm/1000 Hr Bipolar Negative Full-Scale Error2 See Note 4 Negative Full-Scale Drift vs. Temp2, 7 1 µV/°C typ Power Supply Rejection11 90 dB typ Input Range = 20 mV Power Supply Rejection11 60 dB typ Input Range = 1.28 V Common-Mode Rejection (CMR)11 On AIN 95 dB typ At DC. Input Range = 20 mV On AIN 85 dB typ At DC. Input Range = 1.28 V On REF IN 120 dB typ Analog Input DC Bias Current2 60 nA max Analog Input DC Bias Current Drift2 150 pA/°C typ Analog Input DC Offset Current2 30 nA max Analog Input DC Offset Current Drift2 100 pA/°C typ STATIC PERFORMANCE (CHP = 1)2 No Missing Codes 24 Bits min Output Noise and Update Rates See Tables III and IV Integral Nonlinearity 15 ppm of FSR max Offset Error See Note 4 Offset Error and Offset Drift Refer to Both Offset Drift vs. Temperature 5 nV/°C typ Unipolar Offset and Bipolar Zero Errors Offset Drift vs. Time5 25 nV/1000 Hr typ Positive Full-Scale Error6 See Note 4 Positive Full-Scale Drift vs. Temp7, 8 2 ppm of FS/°C max Positive Full-Scale Drift vs. Time5 10 ppm of FS/1000 Hr Gain Error9 See Note 4 Gain Drift vs. Temperature7, 10 2 ppm/°C max Gain Drift vs. Time5 10 ppm/1000 Hr Bipolar Negative Full-Scale Error See Note 4 Negative Full-Scale Drift vs. Temp 2 ppm of FS/°C max Power Supply Rejection11 110 dB typ Input Range = 20 mV Power Supply Rejection11 85 dB typ Input Range = 1.28 V Common-Mode Rejection (CMR)11 On AIN 110 dB typ At DC. Input Range = 20 mV On AIN 85 dB typ At DC. Input Range = 1.28 V On REF IN 120 dB typ Analog Input DC Bias Current 50 nA max Analog Input DC Bias Current Drift 100 pA/°C typ Analog Input DC Offset Current 10 nA max Analog Input DC Offset Current Drift 50 pA/°C typ ANALOG INPUTS/REFERENCE INPUTS Normal Mode 50 Hz/60 Hz Rejection2 88 dB min 50 Hz/60 Hz ± 1 Hz. SKIP = 0 Common-Mode 50 Hz/60 Hz Rejection2 120 dB min 50 Hz/60 Hz ± 1 Hz. SKIP = 0 Analog Inputs Differential Input Voltage Ranges12 Assuming 2.5 V or 5 V Reference with HIREF Bit Set Appropriately 0 to +20 or ± 20 mV nom RN2, RN1, RN0 of Mode Register = 0, 0, 1 0 to +40 or ± 40 mV nom RN2, RN1, RN0 of Mode Register = 0, 1, 0 0 to +80 or ± 80 mV nom RN2, RN1, RN0 of Mode Register = 0, 1, 1 0 to +160 or ± 160 mV nom RN2, RN1, RN0 of Mode Register = 1, 0, 0 0 to +320 or ± 320 mV nom RN2, RN1, RN0 of Mode Register = 1, 0, 1 0 to +640 or ± 640 mV nom RN2, RN1, RN0 of Mode Register = 1, 1, 0 0 to +1.28 or ± 1.28 V nom RN2, RN1, RN0 of Mode Register = 1, 1, 1 –2– REV. 0 REV. A Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM AD7731-SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS Ordering Guide ESD Caution PIN CONFIGURATION Pin Function Descriptions TERMINOLOGY OUTPUT NOISE AND RESOLUTION SPECIFICATION Output Noise (CHP = 0, SKIP= 1) Output Noise (CHP = 1, SKIP = 0) ON-CHIP REGISTERS Communications Register (RS2-RS0 = 0, 0, 0) Status Register (RS2-RS0 = 0, 0, 0); Power-On/Reset Status: CX Hex Data Register (RS2-RS0 = 0, 0, 1); Power On/Reset Status: 000000 Hex Mode Register (RS2-RS0 = 0, 1, 0); Power-On/Reset Status: 0174 Hex Filter Register (RS2-RS0 = 0, 1, 1); Power-On/Reset Status: 2002 Hex Offset Calibration Register (RS2-RS0 = 1, 0, 1) Gain Calibration Register (RS2-RS0 = 1, 1, 0) Test Register (RS2-RS0 = 1, 1, 1); Power On/Reset Status: 000000 Hex READING FROM AND WRITING TO THE ON-CHIP REGISTERS CALIBRATION OPERATION SUMMARY CIRCUIT DESCRIPTION ANALOG INPUT Analog Input Channels Buffered Inputs Analog Input Ranges Programmable Gain Amplifier Bipolar/Unipolar Inputs Burnout Currents REFERENCE INPUT Reference Detect SIGMA-DELTA MODULATOR DIGITAL FILTERING Filter Architecture First State Filter/SKIP Mode Enabled (SKIP =1) Nonchop Mode (SKIP =1, CHP = 0) Chop Mode (SKIP = 1, CHP =1) Second Stage Filter Normal FIR Operation (SKIP = 0) Chop Mode (SKIP = 0, CHP =1) Nonchop Mode (SKIP = 1, CHP = 0) FASTStep Mode (SKIP = 0, FAST = 1) CALIBRATION Internal Zero-Scale Calibration Internal Full-Scale Calibration System Zero-Scale Calibration System Full-Scale Calibration Span and Offset Limits Power-Up and Calibration Drift Considerations USING THE AD7731 Clocking and Oscillator Circuit System Synchronization Single-Shot Conversions Reset Input Standby Mode Digital Outputs POWER SUPPLIES Grounding and Layout Evaluting the AD7731 Performance SERIAL INTERFACE Write Operation Read Operation CONFIGURING THE AD7731 MICROCOMPUTER/MICROPROCESSOR INTERFACING AD7731 to 68HC11 Interface AD7731 to 8051 Interface AD7731 to ADSP-2103/ADSP-2105 Interface APPLICATIONS Data Acquisition Programmable Logic Controllers Pressure Measurement Temperature Measurement Bipolar Input Signals PAGE INDEX TABLE INDEX OUTLINE DIMENSIONS