Datasheet AD6640 (Analog Devices)

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12-Bit, 65 MSPS IF Sampling A/D Converter AD6640 FEATURES FUNCTIONAL BLOCK DIAGRAM 65 MSPS Minimum Sample Rate 80 dB Spurious-Free Dynamic Range AVCC DVCC IF Sampling to 70 MHz 710 mW Power Dissipation AIN BUF TH1 TH2 TH3 A ADC Single 5 V Supply AIN On-Chip T/H and Reference 2.4V Twos Complement Output Format ADC DAC 7 VREF REFERENCE AD6640 3.3 V or 5 V CMOS Compatible Output Levels 6 ENCODE INTERNAL DIGITAL ERROR CORRECTION LOGIC TIMING APPLICATIONS ENCODE MSB LSB Cellular/PCS Base Stations GND D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Multichannel, Multimode Receivers GPS Anti-Jamming Receivers Communications Receivers Phased Array Receivers GENERAL DESCRIPTION PRODUCT HIGHLIGHTS
The AD6640 is a high speed, high performance, low power, 1. Guaranteed sample rate is 65 MSPS. monolithic 12-bit analog-to-digital converter. All necessary 2. Fully differential analog input stage specified for frequencies functions, including track-and-hold (T/H) and reference, are up to 70 MHz; enables IF sampling. included on-chip to provide a complete conversion solution. 3. Low power dissipation: 710 mW off a single 5 V supply. The AD6640 runs on a single 5 V supply and provides CMOS 4. Digital outputs may be run on 3.3 V supply for easy interface compatible digital outputs at 65 MSPS. to digital ASICs. Specifically designed to address the needs of multichannel, 5. Complete solution: reference and track-and-hold. multimode receivers, the AD6640 maintains 80 dB spurious- 6. Packaged in small, surface-mount 44-lead plastic LQFP. free dynamic range (SFDR) over a bandwidth of 25 MHz. Noise performance is also exceptional: typical signal-to-noise ratio is 68 dB. The AD6640 is built on Analog Devices’ high speed complemen- tary bipolar process (XFCB) and uses an innovative multipass architecture. Units are packaged in a 44-lead plastic quad flatpack (LQFP) specified from –40°C to +85°C. REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise
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Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS DC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS AC SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS ORDERING GUIDE PIN FUNCTION DESCRIPTIONS PIN CONFIGURATION DEFINITION OF SPECIFICATIONS Analog Bandwidth (Small Signal) Aperture Delay Aperture Uncertainty (Jitter) Differential Nonlinearity Encode Pulsewidth/Duty Cycle Integral Nonlinearity Minimum Conversion Rate Maximum Conversion Rate Output Propagation Delay Power Supply Rejection Ratio Signal-to-Noise-and-Distortion (SINAD) Signal-to-Noise Ratio (SNR) Spurious-Free Dynamic Range (SFDR) Two-Tone Intermodulation Distortion Rejection Two-Tone SFDR Worst Harmonic Equivalent Circuits Typical Performance Characteristics THEORY OF OPERATION APPLYING THE AD6640 Encoding the AD6640 Driving the Analog Input Power Supplies Output Loading Layout Information Evaluation Boards DIGITAL WIDEBAND RECEIVERS Introduction System Description System Requirements Noise Floor and SNR Processing Gain Overcoming Static Nonlinearities with Dither Receiver Example IF Sampling Using the AD6640 as a Mix-Down Stage RECEIVE CHAIN FOR A PHASED-ARRAY CELLULAR BASE STATION OUTLINE DIMENSIONS Revision History