Datasheet AD7476, AD7477, AD7478 (Analog Devices) - 7

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AD7476/AD7477/AD7478 AD7478 SPECIFICATIONS
VDD = 2.7 V to 5.25 V, fSCLK = 20 MHz, TA = TMIN to TMAX, unless otherwise noted.
Table 3. Parameter A Version1,2 S Version1,2 Unit Test Conditions/Comments
DYNAMIC PERFORMANCE fIN = 100 kHz sine wave, fSAMPLE = 1 MSPS Signal-to-(Noise + Distortion) (SINAD)3 49 49 dB min Total Harmonic Distortion (THD)3 −65 −65 dB max Peak Harmonic or Spurious Noise (SFDR)3 −65 −65 dB max Intermodulation Distortion (IMD)3 Second-Order Terms −68 −68 dB typ fa = 498.7 kHz, fb = 508.7 kHz Third-Order Terms −68 −68 dB typ fa = 498.7 kHz, fb = 508.7 kHz Aperture Delay 10 10 ns typ Aperture Jitter 30 30 ps typ Full Power Bandwidth 6.5 6.5 MHz typ @ 3 dB DC ACCURACY Resolution 8 8 Bits Integral Nonlinearity3 ±0.5 ±0.5 LSB max Differential Nonlinearity3 ±0.5 ±0.5 LSB max Guaranteed no missed codes to eight bits Offset Error ±0.5 ±0.5 LSB max Gain Error ±0.5 ±0.5 LSB max Total Unadjusted Error (TUE) ±0.5 ±0.5 LSB max ANALOG INPUT Input Voltage Ranges 0 to VDD 0 to VDD V DC Leakage Current ±1 ±1 μA max Input Capacitance 30 30 pF typ LOGIC INPUTS Input High Voltage, VINH 2.4 2.4 V min Input Low Voltage, VINL 0.8 0.8 V max VDD = 5 V 0.4 0.4 V max VDD = 3 V Input Current, IIN, SCLK Pin ±1 ±1 μA max Typically 10 nA, VIN = 0 V or VDD Input Current, IIN, CS Pin ±1 ±1 μA typ Input Capacitance, C 4 IN 10 10 pF max LOGIC OUTPUTS Output High Voltage, VOH VDD − 0.2 VDD − 0.2 V min ISOURCE = 200 μA, VDD = 2.7 V to 5.25 V Output Low Voltage, VOL 0.4 0.4 V max ISINK = 200 μA Floating-State Leakage Current ±10 ±10 μA max Floating-State Output Capacitance4 10 10 pF max Output Coding Straight (Natural) Binary CONVERSION RATE Conversion Time 800 800 ns max 16 SCLK cycles with SCLK at 20 MHz Track-and-Hold Acquisition Time 400 400 ns max Throughput Rate 1 1 MSPS max See Serial Interface section POWER REQUIREMENTS VDD 2.7/5.25 2.7/5.25 V min/max IDD Digital I/Ps = 0 V or VDD Normal Mode (Static) 2 2 mA typ VDD = 4.75 V to 5.25 V, SCLK on or off 1 1 mA typ VDD = 2.7 V to 3.6 V, SCLK on or off Normal Mode (Operational) 3.5 3.5 mA max VDD = 4.75 V to 5.25 V, fSAMPLE = 1 MSPS 1.6 1.6 mA max VDD = 2.7 V to 3.6 V, fSAMPLE = 1 MSPS Full Power-Down Mode 1 1 μA max SCLK off 80 80 μA max SCLK on Rev. F | Page 7 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AD7476 SPECIFICATIONS AD7477 SPECIFICATIONS AD7478 SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM Analog Input Digital Input MODES OF OPERATION Normal Mode Power-Down Mode Power-Up Time POWER VS. THROUGHPUT RATE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7476/AD7477/AD7478 to TMS320C5x/C54x Interface AD7476/AD7477/AD7478 to ADSP-21xx Interface AD7476/AD7477/AD7478 to DSP56xxx Interface AD7476/AD7477/AD7478 to MC68HC16 Interface OUTLINE DIMENSIONS ORDERING GUIDE