Datasheet AD9226 (Analog Devices) - 7

AD9226 PIN CONNECTION PIN CONNECTION 48-Lead LQFP 28-Lead SSOP CLK 1 28 DRVDD (LSB) BIT 12 2 27 DRVSS BIT 11 3 26 AVDD BIT 10 4 25 AVSS VR VINB VINA CM LEVEL NC MODE1 CAPT CAPT CAPB CAPB REF COM (AVSS) VREF 48 47 46 45 44 43 42 41 40 39 38 37 BIT 9 5 24 VINB 1 BIT 8 6 23 VINA AVSS 36 SENSE PIN 1 AD9226 2 AVSS IDENTIFIER 35 BIT 7 7 MODE2 TOP VIEW 22 MODE AVDD 3 34 (Not to Scale) AVDD BIT 6 8 21 CAPT AVDD 4 33 AVSS BIT 5 9 20 CAPB NC 5 32 AVSS AD9226 BIT 4 10 19 REFCOM (AVSS) NC 6 31 AVDD TOP VIEW CLK 7 BIT 3 11 18 VREF 30 (Not to Scale) DRVSS NC 8 29 DRVDD BIT 2 12 17 SENSE OEB 9 28 OTR (MSB) BIT 1 13 16 AVSS NC 10 27 BIT 1 (MSB) OTR 14 15 AVDD 11 NC 26 BIT 2 (LSB) BIT 12 12 25 BIT 3 13 14 15 16 17 18 19 20 21 22 23 24 NC = NO CONNECT BIT 9 BIT 8 BIT 7 BIT 6 BIT 5 BIT 4 BIT 11 DRVSS BIT 10 DRVDD DRVSS DRVDD 48-PIN FUNCTION DESCRIPTIONS 28-PIN FUNCTION DESCRIPTIONS Pin Pin Number Name Description Number Name Description
1, 2, 32, 33 AVSS Analog Ground 1 CLK Clock Input Pin 3, 4, 31, 34 AVDD 5 V Analog Supply 2 BIT 12 Least Significant Data Bit (LSB) 5, 6, 8, 10, NC No Connect 3–12 BITS 11–2 Data Output Bits 11, 44 13 BIT 1 Most Significant Data Bit (MSB) 7 CLK Clock Input Pin 14 OTR Out of Range 9 OEB Output Enable (Active Low) 15, 26 AVDD 5 V Analog Supply 12 BIT 12 Least Significant Data Bit (LSB) 16, 25 AVSS Analog Ground 13 BIT 11 Data Output Bit 17 SENSE Reference Select 14, 22, 30 DRVSS Digital Output Driver Ground 18 VREF Input Span Select (Reference I/O) 15, 23, 29 DRVDD 3 V to 5 V Digital Output 19 REFCOM Reference Common Driver Supply (AVSS) 16–21, BITS 10–5, Data Output Bits 20 CAPB Noise Reduction Pin 24–26 BITS 4–2 21 CAPT Noise Reduction Pin 27 BIT 1 Most Significant Data Bit (MSB) 22 MODE Data Format Select /Clock Stabilizer 28 OTR Out of Range 23 VINA Analog Input Pin (+) 35 MODE2 Data Format Select 24 VINB Analog Input Pin (–) 36 SENSE Reference Select 27 DRVSS Digital Output Driver Ground 37 VREF Reference In/Out 28 DRVDD 3 V to 5 V Digital Output 38 REFCOM Reference Common Driver Supply (AVSS) 39, 40 CAPB Noise Reduction Pin 41, 42 CAPT Noise Reduction Pin 43 MODE1 Clock Stabilizer 45 CM LEVEL Midsupply Reference 46 VINA Analog Input Pin (+) 47 VINB Analog Input Pin (–) 48 VR Noise Reduction Pin –6– REV. B