Datasheet AD7490 (Analog Devices)
Hersteller | Analog Devices |
Beschreibung | 16-Channel, 1MSPS, 12-Bit ADC with Sequencer in 28-Lead TSSOP |
Seiten / Seite | 29 / 1 — 16-Channel, 1 MSPS, 12-Bit ADC. with Sequencer in 28-Lead TSSOP. Data … |
Revision | D |
Dateiformat / Größe | PDF / 759 Kb |
Dokumentensprache | Englisch |
16-Channel, 1 MSPS, 12-Bit ADC. with Sequencer in 28-Lead TSSOP. Data Sheet. AD7490. FEATURES. FUNCTIONAL BLOCK DIAGRAM
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16-Channel, 1 MSPS, 12-Bit ADC with Sequencer in 28-Lead TSSOP Data Sheet AD7490 FEATURES FUNCTIONAL BLOCK DIAGRAM Fast throughput rate: 1 MSPS VDD Specified for VDD of 2.7 V to 5.25 V AD7490 Low power at maximum throughput rates REFIN 5.4 mW maximum at 870 kSPS with 3 V supplies 12-BIT 12.5 mW maximum at 1 MSPS with 5 V supplies V SUCCESSIVE IN0 T/H APPROXIMATION 16 (single-ended) inputs with sequencer ADC Wide input bandwidth INPUT MUX 69.5 dB SNR at 50 kHz input frequency Flexible power/serial clock speed management VIN15 No pipeline delays High speed serial interface, SPI/QSPI™/MICROWIRE™/ SCLK CONTROL DOUT DSP compatible SEQUENCER LOGIC DIN Full shutdown mode: 0.5 µA maximum CS 28-lead TSSOP and 32-lead LFCSP packages VDRIVE
001
AGND
02691- Figure 1.
GENERAL DESCRIPTION
The AD7490 is a 12-bit high speed, low power, 16-channel, frequency because this is also used as the master clock to successive approximation ADC. The part operates from a single control the conversion. 2.7 V to 5.25 V power supply and features throughput rates up The AD7490 is available in a 32-lead LFCSP and a 28-lead to 1 MSPS. The part contains a low noise, wide bandwidth TSSOP package. track-and-hold amplifier that can handle input frequencies in excess of 1 MHz.
PRODUCT HIGHLIGHTS
The conversion process and data acquisition are controlled 1. The AD7490 offers up to 1 MSPS throughput rates. At using CS and the serial clock signal, allowing the device to maximum throughput with 3 V supplies, the AD7490 easily interface with microprocessors or DSPs. The input signal dissipates just 5.4 mW of power. is sampled on the falling edge of CS, and conversion is also 2. A sequence of channels can be selected, through which the initiated at this point. There are no pipeline delays associated AD7490 cycles and converts. with the part. 3. The AD7490 operates from a single 2.7 V to 5.25 V supply. The VDRIVE function allows the serial interface to connect The AD7490 uses advanced design techniques to achieve very directly to either 3 V or 5 V processor systems independent low power dissipation at high throughput rates. For maximum of VDD. throughput rates, the AD7490 consumes just 1.8 mA with 3 V 4. The conversion rate is determined by the serial clock, supplies, and 2.5 mA with 5 V supplies. allowing the conversion time to be reduced through the By setting the relevant bits in the control register, the analog serial clock speed increase. The part also features various input range for the part can be selected to be a 0 V to REFIN shutdown modes to maximize power efficiency at lower input or a 0 V to 2 × REFIN input, with either straight binary throughput rates. Power consumption is 0.5 µA, maximum, or twos complement output coding. The AD7490 features 16 when in full shutdown. single-ended analog inputs with a channel sequencer to allow a 5. The part features a standard successive approximation preprogrammed selection of channels to be converted sequen- ADC with accurate control of the sampling instant via a CS tially. The conversion time is determined by the SCLK input and once off conversion control.
Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2002–2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline Features Functional Block Diagram General Description Product Highlights Revision History Specifications Timing Specifications Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Terminology Internal Register Structure Control Register Sequencer Operation Shadow Register Theory of Operation Circuit Information Converter Operation Analog Input ADC Transfer Function Handling Bipolar Input Signals Typical Connection Diagram Analog Input Channels Digital Input VDRIVE Reference Section Modes of Operation Normal Mode (PM1 = PM0 = 1) Full Shutdown (PM1 = 1, PM0 = 0) Auto Shutdown (PM1 = 0, PM0 = 1) Auto Standby (PM1 = PM0 = 0) Powering Up the AD7490 Serial Interface Power vs. Throughput Rate Microprocessor Interfacing AD7490 to TMS320C541 AD7490 to ADSP-21xx AD7490 to DSP563xx Application Hints Grounding and Layout PCB Design Guidelines for Chip Scale Package Evaluating the AD7490 Performance Outline Dimensions Ordering Guide