Datasheet AD7677 (Analog Devices) - 10
| Hersteller | Analog Devices |
| Beschreibung | 16-Bit, 1 LSB INL, 1 MSPS Differential PulSAR ADC |
| Seiten / Seite | 21 / 10 — Typical Performance Characteristics–AD7677. 1.00. 0.75. 0.50. 0.25. 0.00. … |
| Revision | A |
| Dateiformat / Größe | PDF / 384 Kb |
| Dokumentensprache | Englisch |
Typical Performance Characteristics–AD7677. 1.00. 0.75. 0.50. 0.25. 0.00. INL – LSB. DNL – LSB. –0.25. –0.50. –0.75. –1.00. 16384. 32768. 49152
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Textversion des Dokuments
Typical Performance Characteristics–AD7677 1.00 1.00 0.75 0.75 0.50 0.50 0.25 0.25 0.00 0.00 INL – LSB DNL – LSB –0.25 –0.25 –0.50 –0.50 –0.75 –0.75 –1.00 –1.00 0 16384 32768 49152 65536 0 16384 32768 49152 65536 CODE CODE
TPC 1. Integral Nonlinearity vs. Code TPC 4. Differential Nonlinearity vs. Code
9000 16000 8287 8066 14352 8000 14000 7000 12000 6000 10000 5000 8000 COUNTS 4000 COUNTS 6000 3000 4000 2000 1000 2000 994 1037 0 0 0 10 21 0 0 0 0 0 0 1 0 0 0 0 0000 0000 7FFB 7FFC 7FFD 7FFE 7FFF 8000 8001 8002 8003 8004 7FFA 7FFB 7FFC 7FFD 7FFE 7FFF 8000 8001 8002 8003 8004 CODE IN HEXA CODE IN HEXA
TPC 2. Histogram of 16,384 Conversions of a TPC 5. Histogram of 16,384 Conversions of a DC Input at the Code Transition DC Input at the Code Center
20 20 16 16 12 12 8 8 NUMBER OF UNITS NUMBER OF UNITS 4 4 0 0 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 –1.0 –0.9 –0.8 –0.7 –0.6 –0.5 –0.4 –0.3 –0.2 –0.1 0.0 1.0 POSITIVE INL – LSB NEGATIVE INL – LSB
TPC 3. Typical Positive INL Distribution (199 Units) TPC 6. Typical Negative INL Distribution (199 Units) REV. A –9– Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM PulSAR Selection GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS Table I. Serial Clock Timings in Master Read after Convert ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE PIN FUNCTION DESCRIPTIONS PIN CONFIGURATION Typical Performance Characteristics CIRCUIT INFORMATION CONVERTER OPERATION Modes of Operation Transfer Functions TYPICAL CONNECTION DIAGRAM Analog Inputs Single to Differential Driver Driver Amplifier Choice Voltage Reference Input Power Supply POWER DISSIPATION CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read after Conversion External Clock Data Read During Conversion MICROPROCESSOR INTERFACING SPI Interface (MC68HC11) ADSP-21065L in Master Serial Interface APPLICATION HINTS Layout Evaluating the AD7677 Performance OUTLINE DIMENSIONS Revision History
TPC 1. Integral Nonlinearity vs. Code TPC 4. Differential Nonlinearity vs. Code
9000 16000 8287 8066 14352 8000 14000 7000 12000 6000 10000 5000 8000 COUNTS 4000 COUNTS 6000 3000 4000 2000 1000 2000 994 1037 0 0 0 10 21 0 0 0 0 0 0 1 0 0 0 0 0000 0000 7FFB 7FFC 7FFD 7FFE 7FFF 8000 8001 8002 8003 8004 7FFA 7FFB 7FFC 7FFD 7FFE 7FFF 8000 8001 8002 8003 8004 CODE IN HEXA CODE IN HEXA
TPC 2. Histogram of 16,384 Conversions of a TPC 5. Histogram of 16,384 Conversions of a DC Input at the Code Transition DC Input at the Code Center
20 20 16 16 12 12 8 8 NUMBER OF UNITS NUMBER OF UNITS 4 4 0 0 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 –1.0 –0.9 –0.8 –0.7 –0.6 –0.5 –0.4 –0.3 –0.2 –0.1 0.0 1.0 POSITIVE INL – LSB NEGATIVE INL – LSB
TPC 3. Typical Positive INL Distribution (199 Units) TPC 6. Typical Negative INL Distribution (199 Units) REV. A –9– Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM PulSAR Selection GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS Table I. Serial Clock Timings in Master Read after Convert ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE PIN FUNCTION DESCRIPTIONS PIN CONFIGURATION Typical Performance Characteristics CIRCUIT INFORMATION CONVERTER OPERATION Modes of Operation Transfer Functions TYPICAL CONNECTION DIAGRAM Analog Inputs Single to Differential Driver Driver Amplifier Choice Voltage Reference Input Power Supply POWER DISSIPATION CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read after Conversion External Clock Data Read During Conversion MICROPROCESSOR INTERFACING SPI Interface (MC68HC11) ADSP-21065L in Master Serial Interface APPLICATION HINTS Layout Evaluating the AD7677 Performance OUTLINE DIMENSIONS Revision History