Datasheet AD7866 (Analog Devices) - 9

AD7866 TERMINOLOGY
the fundamental. Noise is the sum of all nonfundamental sig- nals up to half the sampling frequency (f
Integral Nonlinearity
S/2), excluding dc. The This is the maximum deviation from a straight line passing ratio is dependent on the number of quantization levels in the through the endpoints of the ADC transfer function. The digitization process; the more levels, the smaller the quantiza- endpoints of the transfer function are zero scale, a point 1 LSB tion noise. The theoretical signal-to-(noise + distortion) ratio below the first code transition, and full scale, a point 1 LSB above for an ideal N-bit converter with a sine wave input is given by: the last code transition. Signal-to-(Noise + Distortion) = (6.02 N + 1.76) dB
Differential Nonlinearity
Thus, for a 12-bit converter, this is 74 dB. This is the difference between the measured and the ideal 1 LSB
Total Harmonic Distortion (THD)
change between any two adjacent codes in the ADC. Total harmonic distortion is the ratio of the rms sum of har-
Offset Error
monics to the fundamental. For the AD7866, it is defined as: This applies to Straight Binary output coding. It is the deviation 2 2 2 2 2 of the first code transition (00 . 000) to (00 . 001) from the V +V3 +V4 +V5 +V THD db ( )=20 2 6 log ideal, i.e., AGND + 1 LSB. V1
Offset Error Match
where V1 is the rms amplitude of the fundamental and V2, V3, This is the difference in Offset Error between the two channels. V4, V5, and V6 are the rms amplitudes of the second through the
Gain Error
sixth harmonics. This applies to Straight Binary output coding. It is the deviation
Peak Harmonic or Spurious Noise
of the last code transition (111 . 110) to (111 . 111) from Peak harmonic, or spurious noise, is defined as the ratio of the the ideal (i.e., VREF – 1 LSB) after the offset error has been rms value of the next largest component in the ADC output adjusted out. spectrum (up to fS/2 and excluding dc) to the rms value of the
Gain Error Match
fundamental. Normally, the value of this specification is deter- This is the difference in Gain Error between the two channels. mined by the largest harmonic in the spectrum. But for ADCs where the harmonics are buried in the noise floor, it will be a
Zero Code Error
noise peak. This applies when using the twos complement output coding option, in particular with the 2 V
Intermodulation Distortion
REF input range as –VREF to +V With inputs consisting of sine waves at two frequencies, fa and fb, REF biased about the VREF point. It is the deviation of the midscale transition (all 1s to all 0s) from the ideal V any active device with nonlinearities will create distortion products IN voltage, i.e., V at sum and difference frequencies of mfa ± nfb where m, n = 0, REF – 1 LSB. 1, 2, 3, and so on. Intermodulation distortion terms are those for
Zero Code Error Match
which neither m nor n are equal to zero. For example, the second This refers to the difference in Zero Code Error between the order terms include (fa + fb) and (fa – fb), while the third order two channels. terms include (2fa + fb), (2fa – fb), (fa + 2fb), and (fa – 2fb).
Positive Gain Error
The AD7866 is tested using the CCIF standard where two This applies when using the twos complement output coding input frequencies near the top end of the input bandwidth are option, in particular with the 2 VREF input range as –VREF to used. In this case, the second order terms are usually distanced +VREF biased about the VREF point. It is the deviation of the last in frequency from the original sine waves while the third order code transition (011 . 110) to (011 . 111) from the ideal terms are usually at a frequency close to the input frequencies. (i.e., +VREF – 1 LSB) after the Zero Code Error has been As a result, the second and third order terms are specified sepa- adjusted out. rately. The calculation of the intermodulation distortion is as
Negative Gain Error
per the THD specification where it is the ratio of the rms sum This applies when using the twos complement output coding of the individual distortion products to the rms amplitude of the option, in particular with the 2 VREF input range as –VREF to sum of the fundamentals expressed in dB. +VREF biased about the VREF point. It is the deviation of the first
Channel-to-Channel Isolation
code transition (100 . 000) to (100 . 001) from the ideal Channel-to-channel isolation is a measure of the level of crosstalk (i.e., –VREF + 1 LSB) after the Zero Code Error has been between channels. It is measured by applying a full-scale adjusted out. (2 VREF), 455 kHz sine wave signal to all unselected input
Track-and-Hold Acquisition Time
channels and determining how much that signal is attenuated in the The track-and-hold amplifier returns into track mode after the selected channel with a 10 kHz signal (0 V to VREF). The figure end of conversion. Track-and-hold acquisition time is the time given is the worst-case across all four channels for the AD7866. required for the output of the track-and-hold amplifier to reach
PSR (Power Supply Rejection)
its final value, within ± 1/2 LSB, after the end of conversion. See the Performance Curves section.
Signal-to-(Noise + Distortion) Ratio (SNDR)
This is the measured ratio of signal-to-(noise + distortion) at the output of the A/D converter. The signal is the rms amplitude of –8– REV. A Document Outline FEATURES GENERAL DESCRIPTION PRODUCT HIGHLIGHTS FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS TERMINOLOGY Integral Nonlinearity Differential Nonlinearity Offset Error Offset Error Match Gain Error Gain Error Match Zero Code Error Zero Code Error Match Positive Gain Error Negative Gain Error Track-and-Hold Acquisition Time Signal-to-(Noise + Distortion) Ratio (SNDR) Total Harmonic Distortion (THD) Peak Harmonic or Spurious Noise Intermodulation Distortion Channel-to-Channel Isolation PSR (Power Supply Rejection) PERFORMANCE CURVES Typical Performance Characteristics CIRCUIT INFORMATION CONVERTER OPERATION ANALOG INPUT Analog Input Ranges Handling Bipolar Input Signals Transfer Functions Digital Inputs REFERENCE CONFIGURATION OPTIONS MODES OF OPERATION Normal Mode Partial Power-Down Mode Full Power-Down Mode POWER-UP TIMES POWER VS. THROUGHPUT RATE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7866 to ADSP-218x AD7866 to TMS320C541 AD7866 to DSP-563xx APPLICATION HINTS Grounding and Layout Evaluating the AD7866 Performance OUTLINE DIMENSIONS Revision History