Datasheet AD7476A, AD7477A, AD7478A (Analog Devices) - 7

HerstellerAnalog Devices
Beschreibung8-Bit, 1 MSPS, Low-Power A/D Converter in SC70 and MSOP Packages
Seiten / Seite28 / 7 — Data Sheet. AD7476A/AD7477A/AD7478A. Parameter. A Grade2. Unit. Test …
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DokumentenspracheEnglisch

Data Sheet. AD7476A/AD7477A/AD7478A. Parameter. A Grade2. Unit. Test Conditions/Comments

Data Sheet AD7476A/AD7477A/AD7478A Parameter A Grade2 Unit Test Conditions/Comments

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Data Sheet AD7476A/AD7477A/AD7478A Parameter A Grade2 Unit Test Conditions/Comments
LOGIC INPUTS Input High Voltage, VINH 2.4 V min 1.8 V min VDD = 2.35 V Input Low Voltage, VINL 0.8 V max VDD = 5 V 0.4 V max VDD = 3 V Input Current, IIN, SCLK Pin ±0.5 μA max Typically 10 nA, VIN = 0 V or VDD Input Current, IIN, CS Pin ±10 nA typ Input Capacitance, C 5 IN 5 pF max LOGIC OUTPUTS Output High Voltage, VOH VDD − 0.2 V min ISOURCE = 200 μA, VDD = 2.35 V to 5.25 V Output Low Voltage, VOL 0.4 V max ISINK = 200 μA Floating-State Leakage Current ±1 μA max Floating-State Output Capacitance5 5 pF max Output Coding Straight (Natural) Binary CONVERSION RATE Conversion Time 600 ns max 12 SCLK cycles with SCLK at 20 MHz Track-and-Hold Acquisition Time3 225 ns max Throughput Rate 1.2 MSPS max POWER REQUIREMENTS VDD 2.35/5.25 V min/max IDD Digital I/Ps = 0 V or VDD Normal Mode (Static) 2.5 mA typ VDD = 4.75 V to 5.25 V, SCLK on or off 1.2 mA typ VDD = 2.35 V to 3.6 V, SCLK on or off Normal Mode (Operational) 3.5 mA max VDD = 4.75 V to 5.25 V 1.7 mA max VDD = 2.35 V to 3.6 V Full Power-Down Mode (Static) 1 μA max Typically 50 nA Full Power-Down Mode (Dynamic) 0.6 mA typ VDD = 5 V, fSAMPLE = 100 kSPS Power Dissipation6 0.3 mA typ VDD = 3 V, fSAMPLE = 100 kSPS Normal Mode (Operational) 17.5 mW max VDD = 5 V 5.1 mW max VDD = 3 V Full Power-Down Mode 5 μW max VDD = 5 V 1 Temperature range is from –40°C to +85°C. 2 Operational from VDD = 2.0 V, with input high voltage (VINH) 1.8 V minimum. 3 See the Terminology section. 4 SC70 values guaranteed by characterization. 5 Guaranteed by characterization. 6 See the Power vs. Throughput Rate section. Rev. G | Page 7 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AD7476A SPECIFICATIONS AD7477A SPECIFICATIONS AD7478A SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION THE CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT DIGITAL INPUTS MODES OF OPERATION NORMAL MODE POWER-DOWN MODE POWER-UP TIME POWER VS. THROUGHPUT RATE SERIAL INTERFACE AD7478A IN A 12 SCLK CYCLE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7476A/AD7477A/AD7478A TO ADSP-2181 INTERFACE AD7476A/AD7477A/AD7478A TO DSP563xx INTERFACE APPLICATION HINTS GROUNDING AND LAYOUT OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS