Datasheet AD7732 (Analog Devices) - 9

AD7732 ABSOLUTE MAXIMUM RATINGS Table 3. TA = 25°C, unless otherwise noted. Parameter Rating
AVDD to AGND, DVDD to DGND –0.3 V to +7 V AGND to DGND –0.3 V to +0.3 V AVDD to DVDD –5 V to +5 V AIN to AGND –50 V to +50 V RA, RB, RC, RD to AGND –11 V to +25 V BIAS to AGND –0.3 V to AVDD + 0.3 V REFIN+, REFIN– to AGND –0.3 V to AVDD + 0.3 V P0, P1 Voltage to AGND –0.3 V to AVDD + 0.3 V P0, P1 Current (TMAX = 70°C) 8 mA P0, P1 Current (TMAX = 85°C) 5 mA P0, P1 Current (TMAX = 105°C) 2.5 mA Digital Input Voltage to DGND –0.3 V to DVDD + 0.3 V Digital Output Voltage to DGND –0.3 V to DVDD + 0.3 V Operating Temperature Range –40°C to +105°C Storage Temperature Range –65°C to +150°C Junction Temperature 150°C TSSOP Package, Power Dissipation 660 mW θJA Thermal Impedance 97.9°C/W Lead Temperature, Soldering Vapor Phase (60 sec) 215°C Infrared (15 sec) 220°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. A | Page 8 of 32 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY AD7732—SPECIFICATIONS Table 1. (–40°C to +105°C; AVDD = 5 V ± 5%; DVDD = 2.7 V to 3.6 V, or 5 V ± 5%; BIAS (all), REFIN(+) = 2.5 V; REFIN(–) = AGND; RA, RB, RC, RD open circuit; AIN Range = ±10 V; fMCLKIN = 6.144 MHz; unless otherwise noted.) TIMING SPECIFICATIONS Table 2. (AVDD = 5 V ± 5%; DVDD = 2.7 V to 3.6 V, or 5 V ± 5%; Input Logic 0 = 0 V; Logic 1 = DVDD; unless otherwise noted.) ABSOLUTE MAXIMUM RATINGS Table 3. TA = 25°C, unless otherwise noted. TYPICAL PERFORMANCE CHARACTERISTICS OUTPUT NOISE AND RESOLUTION SPECIFICATION Chopping Enabled Table 4. Typical Output RMS Noise in µV vs. Conversion Time and Input Range with Chopping Enabled Table 5. Typical Effective Resolution in Bits vs. Conversion Time and Input Range with Chopping Enabled Table 6. Typical Peak-to-Peak Resolution in Bits vs. Conversion Time and Input Range with Chopping Enabled Chopping Disabled Table 7. Typical Output RMS Noise in µV vs. Conversion Time and Input Range with Chopping Disabled Table 8. Typical Effective Resolution in Bits vs. Conversion Time and Input Range with Chopping Disabled Table 9. Typical Peak-to-Peak Resolution in Bits vs. Conversion Time and Input Range with Chopping Disabled PIN CONFIGURATIONS AND FUNCTIONAL DESCRIPTIONS Table 10. Pin Function Descriptions—28-Lead TSSOP REGISTER DESCRIPTION Table 11. Register Summary Table 12. Operational Mode Summary Table 13. Input Range Summary Register Access Communications Register Table 14. I/O Port Register Revision Register Test Register ADC Status Register Checksum Register ADC Zero-Scale Calibration Register ADC Full-Scale Register Channel Data Registers Channel Zero-Scale Calibration Registers Channel Full-Scale Calibration Registers Channel Status Registers Channel Setup Registers Table 15. Channel Conversion Time Registers Mode Register DIGITAL INTERFACE DESCRIPTION Hardware Reset Access the AD7732 Registers Single Conversion and Reading Data Dump Mode Continuous Conversion Mode Continuous Read (Continuous Conversion) Mode CIRCUIT DESCRIPTION Analog Front End Analog Input’s Extended Voltage Range Table 16. Extended Input Voltage Range, Nominal Voltage Range ±10 V, 16 Bits, CLAMP = 0 Table 17. Extended Input Voltage Range, Nominal Voltage Range 0 V to +10 V, 16 Bits, CLAMP = 0 Chopping Multiplexer, Conversion, and Data Output Timing Sigma-Delta ADC Frequency Response Voltage Reference Inputs Reference Detect I/O Port Calibration ADC Zero-Scale Self-Calibration Per Channel System Calibration High Common-Mode Voltage Application OUTLINE DIMENSIONS Ordering Guide