Datasheet AD9244 (Analog Devices) - 8

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AD9244 ABSOLUTE MAXIMUM RATINGS Table 5. With Parameter Respect to Rating
Stresses above those listed under Absolute Maximum Ratings ELECTRICAL may cause permanent damage to the device. This is a stress AVDD AGND –0.3 V to +6.5 V rating only; functional operation of the device at these or any DRVDD DGND −0.3 V to +6.5 V other conditions above those indicated in the operational AGND DGND –0.3 V to +0.3 V sections of this specification is not implied. Exposure to AVDD DRVDD –6.5 V to +6.5 V absolute maximum ratings for extended periods may affect REFGND AGND –0.3 V to +0.3 V device reliability. CLK+, CLK–, DCS AGND –0.3 V to AVDD + 0.3 V
EXPLANATION OF TEST LEVELS
DFS AGND –0.3 V to AVDD + 0.3 V VIN+, VIN– AGND –0.3 V to AVDD + 0.3 V
Table 6.
VREF AGND –0.3 V to AVDD + 0.3 V SENSE AGND –0.3 V to AVDD + 0.3 V
Test Level Description
REFB, REFT AGND –0.3 V to AVDD + 0.3 V I 100% production tested. CML AGND –0.3 V to AVDD + 0.3 V II 100% production tested at 25°C and sample tested at VR AGND –0.3 V to AVDD + 0.3 V specified temperatures. OTR DGND –0.3 V to DRVDD + 0.3 V III Sample tested only. D0 to D13 DGND –0.3 V to DRVDD + 0.3 V IV Parameter is guaranteed by design and characterization OEB DGND –0.3 V to DRVDD + 0.3 V testing. ENVIRONMENTAL1 V Parameter is a typical value only. Junction Temperature 150°C VI 100% production tested at 25°C; guaranteed by design Storage Temperature −65°C to +150°C and characterization testing for industrial temperature Operating Temperature −40°C to +85°C range; 100% production tested at temperature extremes Lead Temperature (10 sec) 300°C for military devices. 1 Typical thermal impedances; θJA = 50.0°C/W; θJC = 17.0°C/W. These measurements were taken on a 4-layer board in still air, in accordance with EIA/JESD51-7.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. C | Page 7 of 36 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL APPLICATION CIRCUITS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ANALOG INPUT AND REFERENCE OVERVIEW ANALOG INPUT OPERATION Single-Ended Input Configuration Differentially Driving the Analog Inputs REFERENCE OPERATION Pin-Programmable Reference Resistor-Programmable Reference Using an External Reference Digital Outputs Data Format Select (DFS) Digital Output Driver Considerations DIGITAL INPUTS AND OUTPUTS Out of Range (OTR) Digital Output Enable Function (OEB) Clock Overview Clock Input Modes Clock Input Considerations Clock Power Dissipation Clock Stabilizer (DCS) Grounding and Decoupling Analog and Digital Grounding Analog Supply Decoupling Digital Supply Decoupling Reference Decoupling CML VR EVALUATION BOARD ANALOG INPUT CONFIGURATION REFERENCE CONFIGURATION CLOCK CONFIGURATION OUTLINE DIMENSIONS ORDERING GUIDE