AD7911/AD7921PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS8-LEAD TSOT8-LEAD MSOPDIN18VIN1DOUT18VAD7911/DDAD7911/SCLK27VIN0AD7921CS27GNDAD7921CS36GNDSCLK36VTOP VIEWIN0TOP VIEWDOUT4(Not to Scale)5VDDDIN4(Not to Scale)5VIN1 04350-0-008 04350-0-034 Figure 8. 8-Lead TSOT Pin Configuration Figure 9. 8-Lead MSOP Pin Configuration Table 5. Pin Function Descriptions TSOTMSOPPin No.Pin No.Mnemonic Function 1 4 DIN Data In. Logic input. The channel to be converted is provided on this input and is clocked into an internal register on the falling edge of SCLK. 2 3 SCLK Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock input is also used as the clock source for the AD7911/AD7921’s conversion process. 3 2 CS Chip Select. Active low logic input. This input provides the dual function of initiating conversions on the AD7911/AD7921 and framing the serial data transfer. 4 1 DOUT Data Out. Logic output. The conversion result from the AD7911/AD7921 is provided on this output as a serial data stream. The bits are clocked out on the falling edge of the SCLK signal. For the AD7921, the data stream consists of two leading zeros; the channel identifier bit, which identifies the channel that the conversion result corresponds to; followed by an invalid bit that matches up to the channel identifier bit; followed by the 12 bits of conversion data, with MSB first. For the AD7911, the data stream consists of two leading zeros; the channel identifier bit, which identifies the channel that the conversion result corresponds to; followed by an invalid bit that matches up to the channel identifier bit; followed by the 10 bits of conversion data, with MSB first and two trailing zeros. 5 8 VDD Power Supply Input. The VDD range for the AD7911/AD7921 is from 2.35 V to 5.25 V. 6 7 GND Analog Ground. Ground reference point for all circuitry on the AD7911/AD7921. All analog input signals should be referred to this GND voltage. 7, 8 6, 5 VIN0, VIN1 Analog Inputs. These two single-ended analog input channels are multiplexed into the on-chip track- and-hold amplifier. The analog input channel to be converted is selected by writing to the third MSB on the DIN pin. The input range is 0 to VDD. Rev. A | Page 10 of 28 Document Outline REVISION HISTORY SPECIFICATIONS AD7911 SPECIFICATIONS AD7921 SPECIFICATIONS TIMING SPECIFICATIONS TIMING DIAGRAMS TIMING EXAMPLES Timing Example 1 Timing Example 2 ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT DIGITAL INPUTS DIN INPUT DOUT OUTPUT MODES OF OPERATION NORMAL MODE POWER-DOWN MODE POWER-UP TIME POWER VS. THROUGHPUT RATE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7911/AD7921 to TMS320C541 Interface AD7911/AD7921 to ADSP-218x AD7911/AD7921 to DSP563xx Interface APPLICATION HINTS GROUNDING AND LAYOUT OUTLINE DIMENSIONS ORDERING GUIDE