Datasheet AD9216 (Analog Devices) - 31

AD9216 µ
F1 C59 0. MUX MUX1 TIEB TIEA
Ω
R18
Ω Ω µ
F 499 1
Ω Ω Ω
R35 R84 R53 0 R20 0 C21 0. NP_0 NP_0 R19 1k
Ω
VD
Ω µ
F1
Ω
R21 1k +5V C32 0. SINGLE CLOCK CIRCUIT R16 NP_499 TO TIE CLOCKS TOGETHER MUX1 SCLK CLKB CLKA R22 NP_40 AMPINA 1 2 3 4 U11 AMPOUTA D N V –I V+ +OUT VOCM 9 EPAD E61 E49 E19 AD8139 N
Ω
OP AMP INPUT OFF PIN ONE OF TRANSFORMER +I NC V– –OUT
Ω Ω
E11 R40 0 R75 1k
Ω
8 7 6 5 ENCA R23 NP_40 R17 525
µ
F
Ω
1 AMPOUTAB R85 0 C33 ENCB 0. SCLK
Ω
–5V R79 22
Ω
R15 499 7 6 5 4 3 2 1 2Y 2B 2A 1Y 1B 1A
µ
F GND C60 NP_0.1 U8
µ
F 74VCX86 C15 NP_0.1 3Y 3A 3B 4Y 4A 4B VCC SINGLE CLOCK PATH 8 9 10 11 12 13 14
Ω
R26
Ω Ω µ
F1 499
µ
F1 R80 22 R76 22 C65 0. C20 0.
Ω
R28 1k VD
Ω µ
F1
Ω Ω
R27 1k +5V C35 0. R25 525 R30 NP_40 CLKB VCLK CLKA
Ω Ω
1 2 3 4 U12 MPOUTBB R77 1k R73 1k A N –I V+ +OUT
Ω Ω
VOCM R72 1k R71 1k 9 EPAD AD8139 VCLK N
Ω Ω
+I NC V– –OUT
µ
F C64 1
Ω
8 7 6 5 R14 50 R24 NP_40 R29 NP_499
µ
F1 AMPOUTB AMPINB C34 0. J5 V –5 CLOCK A/B
Ω
R31 499
040 µ
F C61
04775-
NP_0.1
Figure 53. PCB Schematic (3 of 3) Rev. A | Page 30 of 40 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS LOGIC SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS THEORY OF OPERATION ANALOG INPUT Differential Input Configurations Single-Ended Input Configuration CLOCK INPUT AND CONSIDERATIONS POWER DISSIPATION AND STANDBY MODE DIGITAL OUTPUTS OUTPUT CODING TIMING DATA FORMAT VOLTAGE REFERENCE Internal Reference Connection External Reference Operation Shared Reference Mode DUAL ADC LFCSP PCB POWER CONNECTOR ANALOG INPUTS OPTIONAL OPERATIONAL AMPLIFIER CLOCK VOLTAGE REFERENCE DATA OUTPUTS LFCSP EVALUATION BOARD BILL OF MATERIALS (BOM) LFCSP PCB SCHEMATICS LFCSP PCB LAYERS THERMAL CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE