AD9444AC SPECIFICATIONS AVDD1 = 3.3 V, AVDD2 = 5.0 V, DRVDD = 3.3 V, LVDS mode, sample rate = 80 MSPS, 2 V p-p differential input, internal trimmed reference (1.0 V mode), AIN = −0.5 dBFS, DCS on, unless otherwise noted. Table 2.AD9444BSVZ-80Parameter TempTestLevelMin Typ MaxUnit SIGNAL-TO-NOISE-RATIO (SNR) fIN = 10 MHz 25°C IV 73.0 74.0 dB Full IV 72.7 dB fIN = 35 MHz 25°C I 72.4 73.7 dB Full IV 72.3 dB fIN = 70 MHz 25°C IV 72.3 73.1 dB Full IV 72.0 dB fIN = 100 MHz 25°C V 72.3 dB SIGNAL-TO-NOISE-AND DISTORTION (SINAD) fIN = 10 MHz 25°C IV 73.0 74.0 dB Full IV 72.7 dB fIN = 35 MHz 25°C I 72.4 73.7 dB Full IV 72.2 dB fIN = 70 MHz 25°C IV 72.2 73.1 dB Full IV 72.0 dB fIN = 100 MHz 25°C V 72.3 dB EFFECTIVE NUMBER OF BITS (ENOB) fIN = 10 MHz 25°C V 12.1 Bits fIN = 35 MHz 25°C V 12.0 Bits fIN = 70 MHz 25°C V 11.9 Bits fIN = 100 MHz 25°C V 11.8 Bits SPURIOUS-FREE DYNAMIC RANGE (SFDR) fIN = 10 MHz 25°C IV 91 97 dBc Full IV 87 dBc fIN = 35 MHz 25°C I 91 97 dBc Full IV 87 dBc fIN = 70 MHz 25°C IV 90 97 dBc Full IV 87 dBc fIN = 100 MHz 25°C V 96 dBc WORST HARMONIC, SECOND OR THIRD fIN = 10 MHz 25°C IV −97 −91 dBc Full IV −87 dBc fIN = 35 MHz 25°C I −97 −91 dBc Full IV −87 dBc fIN = 70 MHz 25°C IV −97 −90 dBc Full IV −87 dBc fIN = 100 MHz 25°C V −96 dBc WORST SPUR EXCLUDING SECOND OR HARMONICS fIN = 10 MHz 25°C IV −102 −93 dBc Full IV −93 dBc fIN = 35 MHz 25°C I −103 −93 dBc Full IV −93 dBc fIN = 70 MHz 25°C IV −102 −93 dBc Full IV −93 dBc fIN = 100 MHz 25°C V −99 dBc TWO-TONE SFDR fIN = 10.8 MHz @ −7 dBFS, 9.8 MHz @ −7 dBFS 25°C V −102 dBFS fIN = 70.3 MHz @ −7 dBFS, 69.3 MHz @ −7 dBFS 25°C V −100 dBFS ANALOG BANDWIDTH Full V 650 MHz Rev. 0 | Page 4 of 40 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS EXPLANATION OF TEST LEVELS ABSOLUTE MAXIMUM RATINGS Thermal Resistance ESD CAUTION DEFINITIONS OF SPECIFICATIONS PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS EQUIVALENT CIRCUITS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ANALOG INPUT AND REFERENCE OVERVIEW Internal Reference Connection Internal Reference Trim External Reference Operation Analog Inputs CLOCK INPUT CONSIDERATIONS Jitter Considerations POWER CONSIDERATIONS DIGITAL OUTPUTS LVDS Mode CMOS Mode TIMING OPERATIONAL MODE SELECTION Data Format Select Output Mode Select Duty Cycle Stabilizer EVALUATION BOARD LVDS EVALUATION BOARD SCHEMATICS LVDS MODE EVALUATION BOARD BILL OF MATERIALS (BOM) CMOS EVALUATION BOARD SCHEMATICS CMOS MODE EVALUATION BOARD BILL OF MATERIALS (BOM) OUTLINE DIMENSIONS ORDERING GUIDE