Datasheet AD7760 (Analog Devices)

2.5 MSPS, 24-Bit, 100 dB Sigma-Delta ADC with On-Chip Buffer AD7760
FEATURES FUNCTIONAL BLOCK DIAGRAM 120 dB dynamic range at 78 kHz output data rate V V IN– IN+ 100 dB dynamic range at 2.5 MHz output data rate 112 dB SNR at 78 kHz output data rate MULTIBIT AVDD1 DIFF Ȉ-ǻ 100 dB SNR at 2.5 MHz output data rate MODULATOR AVDD2 2.5 MHz maximum fully filtered output word rate AVDD3 VREF+ Programmable oversampling rate (8× to 256×) AV BUF RECONSTRUCTION DD4 DECAPA/B Fully differential modulator input RBIAS On-chip differential amplifier for signal buffering AD7760 PROGRAMMABLE AGND Low-pass finite impulse response (FIR) filter with default or DECIMATION VDRIVE user-programmable coefficients MCLK DV CONTROL LOGIC DD Modulator output mode I/O SYNC OFFSET AND GAIN DGND REGISTERS Overrange alert bit FIR FILTER RESET ENGINE Digital offset and gain correction registers
1
Filter bypass modes
0 -0 5 7 9
Low power and power-down modes CS RD/WR DRDY DB0 TO DB15
4 0 Figure 1.
Synchronization of multiple devices via SYNC pin APPLICATIONS Data acquisition systems Vibration analysis Instrumentation GENERAL DESCRIPTION
The AD7760 is a high performance, 24-bit Σ-Δ analog-to-digital coefficients. The sample rate, filter corner frequencies, and output converter (ADC). It combines wide input bandwidth and high word rate are set by a combination of the external clock frequency speed with the benefits of Σ-Δ conversion to achieve a perfor- and the configuration registers of the AD7760. mance of 100 dB SNR at 2.5 MSPS, making it ideal for high speed data acquisition. Wide dynamic range combined with The reference voltage supplied to the AD7760 determines the significantly reduced antialiasing requirements simplify the analog input range. With a 4 V reference, the analog input range design process. An integrated buffer to drive the reference, a is ±3.2 V differential biased around a common mode of 2 V. differential amplifier for signal buffering and level shifting, an This common-mode biasing can be achieved using the on-chip overrange flag, internal gain and offset registers, and a low-pass differential amplifier, further reducing the external signal digital FIR filter make the AD7760 a compact, highly integrated conditioning requirements. data acquisition device requiring minimal peripheral component The AD7760 is available in an exposed paddle, 64-lead TQFP selection. In addition, the device offers programmable decimation and is specified over the industrial temperature range from rates, and the digital FIR filter can be adjusted if the default −40°C to +85°C. characteristics are not appropriate for the application. The AD7760 is ideal for applications demanding high SNR
Table 1. Related Devices
without a complex front-end signal processing design.
Part No. Description
AD7762 24-bit, 625 kSPS, 109 dB, Σ-∆ parallel interface The differential input is sampled at up to 40 MSPS by an analog AD7763 24-bit, 625 kSPS, 109 dB, Σ-∆ serial interface modulator. The modulator output is processed by a series of low- pass filters, with the final filter having default or user-programmable
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