Datasheet AD7323 (Analog Devices) - 5

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AD7323 Data Sheet B Version Parameter1 Min Typ Max Unit Test Conditions/Comments
DC ACCURACY Single-ended/pseudo differential mode: 1 LSB = FSR/4096; unless otherwise noted Differential mode: 1 LSB = FSR/8192; unless otherwise noted Resolution 13 Bits No Missing Codes 12-bit plus Bits Differential mode sign (13 bits) 11-bit plus Bits Single-ended/pseudo differential mode sign (12 bits) Integral Nonlinearity2 ±1.1 LSB Differential mode; VCC = 3 V to 5.25 V, typ for VCC = 2.7 V ±1 LSB Single-ended/pseudo differential mode, VCC = 3 V to 5.25 V, typical for VCC = 2.7 V −0.7/+1.2 LSB Single-ended/pseudo differential mode (LSB = FSR/8192) Differential Nonlinearity2 −0.9/+1.2 LSB Differential mode; guaranteed no missing codes to 13 bits ±0.9 LSB Single-ended mode; guaranteed no missing codes to 12 bits −0.7/+1 LSB Single-ended/pseudo differential mode (LSB = FSR/8192) Offset Error2, 4 −4/+9 LSB Single-ended/pseudo differential mode −7/+10 LSB Differential mode Offset Error Match2, 4 ±0.6 LSB Single-ended/pseudo differential mode ±0.5 LSB Differential mode Gain Error2, 4 ±8 LSB Single-ended/pseudo differential mode ±14 LSB Differential mode Gain Error Match2, 4 ±0.5 LSB Single-ended/pseudo differential mode ±0.5 LSB Differential mode Positive Full-Scale Error2, 5 ±4 LSB Single-ended/pseudo differential mode ±7 LSB Differential mode Positive Full-Scale Error ±0.5 LSB Single-ended/pseudo differential mode Match2, 5 ±0.5 LSB Differential mode Bipolar Zero Error2, 5 ±8.5 LSB Single-ended/pseudo differential mode ±7.5 LSB Differential mode Bipolar Zero Error Match2, 5 ±0.5 LSB Single-ended/pseudo differential mode ±0.5 LSB Differential mode Negative Full-Scale Error2, 5 ±4 LSB Single-ended/pseudo differential mode ±6 LSB Differential mode Negative Full-Scale Error ±0.5 LSB Single-ended/pseudo differential mode Match2, 5 ±0.5 LSB Differential mode ANALOG INPUT Input Voltage Ranges Reference = 2.5 V; see Table 6 (Programmed via Range ±10 V VDD = 10 V min, VSS = −10 V min, VCC = 2.7 V to 5.25 V Register) ±5 V VDD = 5 V min, VSS = −5 V min, VCC = 2.7 V to 5.25 V ±2.5 V VDD = 5 V min, VSS = −5 V min, VCC = 2.7 V to 5.25 V 0 to 10 V VDD = 10 V min, VSS = AGND min, VCC = 2.7 V to 5.25 V Pseudo Differential VIN(−) VDD = 16.5 V, VSS = −16.5 V, VCC = 5 V; see Figure 40 and Input Range Figure 41 ±3.5 V Reference = 2.5 V; range = ±10 V ±6 V Reference = 2.5 V; range = ±5 V ±5 V Reference = 2.5 V; range = ±2.5 V +3/−5 V Reference = 2.5 V; range = 0 V to +10 V DC Leakage Current ±80 nA VIN = VDD or VSS 3 nA Per input channel, VIN = VDD or VSS Rev. B | Page 4 of 36 Document Outline Features Functional Block Diagram General Description Product Highlights Table of Contents Revision History Specifications Timing Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Circuit Information Converter Operation Output Coding Transfer Functions Analog Input Structure Track-and-Hold Section Typical Connection Diagram Analog Input Single-Ended Inputs True Differential Mode Pseudo Differential Inputs Driver Amplifier Choice Registers Addressing Registers Control Register Sequence Register Range Register Sequencer Operation Reference VDRIVE Modes of Operation Normal Mode (PM1 = PM0 = 0) Full Shutdown Mode (PM1 = PM0 = 1) Autoshutdown Mode (PM1 = 1, PM0 = 0) Autostandby Mode (PM1 = 0, PM0 = 1) Power vs. Throughput Rate Serial Interface Microprocessor Interfacing AD7323 to ADSP-21xx AD7323 to ADSP-BF53x Application Hints Layout and Grounding Power Supply Configuration Outline Dimensions Ordering Guide