Datasheet AD7324 (Analog Devices) - 10

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Data Sheet AD7324 PIN CONFIGURATION AND FUNCTION DESCRIPTION CS 1 16 SCLK DIN 2 15 DGND DGND 3 14 DOUT AD7324 AGND 4 TOP VIEW 13 VDRIVE (Not to Scale) REFIN/OUT 5 12 VCC V 6 11 SS VDD V 7 10 IN0 VIN2
003
V 8 9 IN1 VIN3
04864- Figure 3. TSSOP Pin Configuration
Table 5. Pin Function Description Pin No. Mnemonic Description
1 CS Chip Select. Active low logic input. This input provides the dual function of initiating conversions on the AD7324 and frames the serial data transfer. 2 DIN Data In. Data should be written to the on-chip registers is provided on this input and is clocked into the register on the falling edge of SCLK (see the Reference section). 3, 15 DGND Digital Ground. Ground reference point for all digital circuitry on the AD7324. The DGND and AGND voltages ideally should be at the same potential and must not be more than 0.3 V apart, even on a transient basis. 4 AGND Analog Ground. Ground reference point for all analog circuitry on the AD7324. All analog input signals and any external reference signal should be referred to this AGND voltage. The AGND and DGND voltages ideally should be at the same potential and must not be more than 0.3 V apart, even on a transient basis. 5 REFIN/OUT Reference Input/Reference Output. The on-chip reference is available on this pin for external use to the AD7324. The nominal internal reference voltage is 2.5 V, which appears at the pin. A 680 nF capacitor should be placed on the reference pin. Alternatively, the internal reference can be disabled, and an external reference applied to this input. On power-up, the external reference mode is the default condition (see the Reference section). 6 VSS Negative Power Supply Voltage. This is the negative supply voltage for the analog input section. 7, 8, 10, 9 VIN0 to VIN3 Analog Input 0 to Analog Input 3. The analog inputs are multiplexed into the on-chip track-and-hold. The analog input channel for conversion is selected by programming the channel address Bit ADD1 and Bit ADD0 in the control register. The inputs can be configured as four single-ended inputs, two true differential input pairs, two pseudo differential inputs, or three pseudo differential inputs. The config- uration of the analog inputs is selected by programming the mode bits, Bit Mode 1 and Bit Mode 0, in the control register. The input range on each input channel is controlled by programming the range register. Input ranges of ±10 V, ±5 V, ±2.5 V, and 0 V to +10 V can be selected on each analog input channel when a +2.5 V reference voltage is used (see the Reference section). 11 VDD Positive Power Supply Voltage. This is the positive supply voltage for the analog input section. 12 VCC Analog Supply Voltage, 2.7 V to 5.25 V. This is the supply voltage for the ADC core on the AD7324. This supply should be decoupled to AGND. Specifications apply from VCC = 4.75 V to 5.25 V. 13 VDRIVE Logic Power Supply Input. The voltage supplied at this pin determines at what voltage the interface operates. This pin should be decoupled to DGND. The voltage at this pin may be different to that at VCC, but it should not exceed VCC by more than 0.3 V. 14 DOUT Serial Data Output. The conversion output data is supplied to this pin as a serial data stream. The bits are clocked out on the falling edge of the SCLK input, and 16 SCLKs are required to access the data. The data stream consists of a leading ZERO bit, two channel identification bits, the sign bit, and 12 bits of conversion data. The data is provided MSB first (see the Serial Interface section). 16 SCLK Serial Clock, Logic Input. A serial clock input provides the SCLK used for accessing the data from the AD7324. This clock is also used as the clock source for the conversion process. Rev. B | Page 9 of 36 Document Outline Features Functional Block Diagram General Description Product Highlights Table of Contents Revision History Specifications Timing Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Description Typical Performance Characteristics Terminology Theory of Operation Circuit Information Converter Operation Output Coding Transfer Functions Analog Input Structure Track-and-Hold Section Typical Connection Diagram Analog Input Single-Ended Inputs True Differential Mode Pseudo Differential Inputs Driver Amplifier Choice Registers Addressing Registers Control Register Sequence Register Range Register Sequencer Operation Reference VDRIVE Modes of Operation Normal Mode Full Shutdown Mode Autoshutdown Mode Autostandby Mode Power vs. Throughput Rate Serial Interface Microprocessor Interfacing AD7324 to ADSP-21xx AD7324 to ADSP-BF53x Application Hints Layout and Grounding Power Supply Configuration Outline Dimensions Ordering Guide