Datasheet AD7641 (Analog Devices) - 5

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AD7641 Parameter Conditions Min Typ Max Unit
Turn-On Settling Time CREF = 10 μF 5 ms REFBUFIN Output Voltage REFBUFIN @ 25°C 1.19 V REFBUFIN Output Resistance 6.33 kΩ EXTERNAL REFERENCE PDREF = PDBUF = high Voltage Range REF 1.8 2.048 AVDD + 0.1 V Current Drain 2 MSPS throughput 180 μA REFERENCE BUFFER PDREF = high, PDBUF = low REFBUFIN Input Voltage Range REF = 2.048 V typ 1.05 1.2 1.30 V REFBUFIN Input Current REFBUFIN = 1.2 V 1 nA TEMPERATURE PIN Voltage Output @ 25°C 278 mV Temperature Sensitivity 1 mV/°C Output Resistance 4.7 kΩ DIGITAL INPUTS Logic Levels VIL −0.3 +0.6 V VIH 1.7 5.25 V IIL −1 +1 μA IIH −1 +1 μA DIGITAL OUTPUTS Data Format7 Pipeline Delay8 VOL ISINK = 500 μA 0.4 V VOH ISOURCE = −500 μA OVDD − 0.3 V POWER SUPPLIES Specified Performance AVDD 2.37 2.5 2.63 V DVDD 2.37 2.5 2.63 V OVDD 2.309 3.6 V Operating Current10 2 MSPS throughput AVDD11 With internal reference 23 mA DVDD 2.5 mA OVDD12 0.5 mA Power Dissipation11 With Internal Reference10 2 MSPS throughput 75 92 mW Without Internal Reference10 2 MSPS throughput 68 85 mW In Power-Down Mode12 PD = high 2 μW TEMPERATURE RANGE13 Specified Performance TMIN to TMAX −40 +85 °C 1 When using an external reference. With the internal reference, the input range is −0.1 V to VREF. 2 See Analog Inputs section. 3 Linearity is tested using endnotes, not best fit. 4 LSB means least significant bit. With the ±2.048 V input range, 1 LSB is 15.63 μV. 5 See Voltage Reference Input section. These specifications do not include the error contribution from the external reference. 6 All specifications in dB are referred to a full-scale input FS. Tested with an input signal at 0.5 dB below full-scale, unless otherwise specified. 7 Parallel or serial 18-bit. 8 Conversion results are available immediately after completed conversion. 9 See the Absolute Maximum Ratings section. 10 In warp mode. Tested in parallel reading mode. 11 With internal reference, PDREF and PDBUF are low; without internal reference, PDREF and PDBUF are high. 12 With all digital inputs forced to OVDD. 13Consult sales for extended temperature range. Rev. 0 | Page 4 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS APPPLICATIONS INFORMATION CIRCUIT INFORMATION CONVERTER OPERATION MODES OF OPERATION TRANSFER FUNCTIONS TYPICAL CONNECTION DIAGRAM ANALOG INPUTS MULTIPLEXED INPUTS DRIVER AMPLIFIER CHOICE Single-to-Differential Driver VOLTAGE REFERENCE INPUT Internal Reference (PDBUF = Low, PDREF = Low) External 1.2 V Reference and Internal Buffer (PDBUF = Low, PDREF = High) External 2.5 V Reference (PDBUF = High, PDREF = High) Reference Decoupling Temperature Sensor POWER SUPPLY Power Sequencing Power-Up CONVERSION CONTROL INTERFACES DIGITAL INTERFACE RESET PARALLEL INTERFACE Master Parallel Interface Slave Parallel Interface 16-Bit and 8-Bit Interface (Master or Slave) SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read After Conversion External Clock Data Read During Previous Conversion MICROPROCESSOR INTERFACING SPI Interface (ADSP-219x) APPLICATION HINTS LAYOUT EVALUATING THE AD7641 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE