Datasheet AD9228 (Analog Devices) - 4

HerstellerAnalog Devices
BeschreibungQuad, 12-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
Seiten / Seite57 / 4 — Data Sheet. AD9228. REVISION HISTORY. 12/11—Rev. D to Rev. E. 4/10—Rev. C …
RevisionF
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DokumentenspracheEnglisch

Data Sheet. AD9228. REVISION HISTORY. 12/11—Rev. D to Rev. E. 4/10—Rev. C to Rev. D. 12/09—Rev. B to Rev. C. 7/07—Rev. A to Rev. B

Data Sheet AD9228 REVISION HISTORY 12/11—Rev D to Rev E 4/10—Rev C to Rev D 12/09—Rev B to Rev C 7/07—Rev A to Rev B

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Data Sheet AD9228 REVISION HISTORY 12/11—Rev. D to Rev. E
Changes to Figure 23 to Figure 26 Captions ... 15 Changes to Output Signals Section and Figure 71 .. 37 Change to Figure 35 Caption ... 17 Change to Default Operation and Jumper Selection Settings Added Figure 46 and Figure 47 ... 20 Section .. 38 Changes to Figure 51 .. 21 Change to Figure 74 .. 41 Changes to Clock Duty Cycle Considerations Section .. 22 Added Endnote 3 in Ordering Guide ... 53 Changes to Power Dissipation and Power-Down Mode Section ... 23 Changes to Figure 61 to Figure 63 Captions ... 25
4/10—Rev. C to Rev. D
Changes to Table 9 Endnote .. 26 Changes to Table 16 .. 35 Changes to Digital Outputs and Timing Section .. 27 Updated Outline Dimensions .. 53 Added Table 10 .. 27 Changes to Ordering Guide ... 53 Changes to RBIAS Pin Section .. 28 Deleted Figure 62 and Figure 63 ... 27
12/09—Rev. B to Rev. C
Changes to Figure 67 .. 29 Updated Outline Dimensions .. 53 Changes to Hardware Interface Section ... 30 Changes to Ordering Guide ... 54 Added Figure 68 .. 31 Changes to Table 15 .. 31
7/07—Rev. A to Rev. B
Changes to Reading the Memory Map Table Section .. 32 Changes to Figure 3 ... 7 Change to Input Signals Section ... 36 Change to Table 7 .. 10 Changes to Output Signals Section ... 36 Changes to Figure 71 .. 36
5/07—Rev. 0 to Rev. A
Changes to Default Operation and Changes to Features .. 1 Jumper Selection Settings Section ... 37 Change to Effective Number of Bits (ENOB) .. 4 Changes to Alternative Analog Input Changes to Logic Output (SDIO/ODM) Section.. 5 Drive Configuration Section .. 38 Added Endnote 3 to Table 3 ... 5 Changes to Figure 74 .. 40 Changes to Pipeline Latency .. 6 Changes to Table 17 .. 48 Added Endnote 2 to Table 4 ... 6 Changes to Ordering Guide ... 52 Changes to Figure 2 to Figure 4 ... 7 Changes to Figure 10 .. 12
4/06—Revision 0: Initial Version
Changes to Figure 15, Figure 17 to Figure 19, Figure 37, and Figure 39 .. 14 Rev. E | Page 3 of 56 Document Outline Features Applications General Description Functional Block Diagram Product Highlights Revision History Specifications AC Specifications Digital Specifications Switching Specifications Timing Diagrams Absolute Maximum Ratings Thermal Impedance ESD Caution Pin Configuration and Function Descriptions Equivalent Circuits Typical Performance Characteristics Theory of Operation Analog Input Considerations Differential Input Configurations Single-Ended Input Configuration Clock Input Considerations Clock Duty Cycle Considerations Clock Jitter Considerations Power Dissipation and Power-Down Mode Digital Outputs and Timing SDIO/ODM Pin SCLK/DTP Pin CSB Pin RBIAS Pin Voltage Reference Internal Reference Operation External Reference Operation Serial Port Interface (SPI) Hardware Interface Memory Map Reading the Memory Map Table Reserved Locations Default Values Logic Levels Power and Ground Recommendations Exposed Paddle Thermal Heat Slug Recommendations Evaluation Board Power Supplies Input Signals Output Signals Default Operation and Jumper Selection Settings Alternative Analog Input Drive Configuration Outline Dimensions Ordering Guide