Datasheet AD9246 (Analog Devices) - 6
Hersteller | Analog Devices |
Beschreibung | 14-Bit, 80 MSPS/105 MSPS/125 MSPS, 1.8 V Analog-to-Digital Converter |
Seiten / Seite | 45 / 6 — AD9246. AC SPECIFICATIONS. Table 2. AD9246BCPZ-80 AD9246BCPZ-105. … |
Revision | A |
Dateiformat / Größe | PDF / 1.0 Mb |
Dokumentensprache | Englisch |
AD9246. AC SPECIFICATIONS. Table 2. AD9246BCPZ-80 AD9246BCPZ-105. AD9246BCPZ-125. Parameter. Temp. Min Typ Max Min Typ Max. Min Typ Max
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AD9246 AC SPECIFICATIONS
AVDD = 1.8 V; DRVDD = 2.5 V, maximum sample rate, 2 V p-p differential input, 1.0 V internal reference;AIN = −1.0 dBFS, DCS enabled, unless otherwise noted.
Table 2. AD9246BCPZ-80 AD9246BCPZ-105 AD9246BCPZ-125 Parameter 1 Temp Min Typ Max Min Typ Max Min Typ Max Unit
SIGNAL-TO-NOISE-RATIO (SNR) fIN = 2.4 MHz 25°C 71.9 71.9 71.9 dBc fIN = 70 MHz 25°C 71.9 71.9 71.7 dBc Full 70.8 69.5 69.5 dBc fIN = 100 MHz 25°C 71.6 71.6 71.6 dBc fIN = 170 MHz 25°C 70.9 70.9 70.8 dBc SIGNAL-TO-NOISE AND DISTORTION (SINAD) fIN = 2.4 MHz 25°C 71.1 71.1 71.1 dBc fIN = 70 MHz 25°C 71.5 70.8 70.6 dBc Full 70.4 68.5 68.5 dBc fIN = 100 MHz 25°C 70.6 70.6 70.6 dBc fIN = 170 MHz 25°C 69.9 69.9 69.8 dBc EFFECTIVE NUMBER OF BITS (ENOB) fIN = 2.4 MHz 25°C 11.7 11.7 11.7 Bits fIN = 70 MHz 25°C 11.6 11.6 11.6 Bits fIN = 100 MHz 25°C 11.6 11.6 11.6 Bits fIN = 170 MHz 25°C 11.5 11.5 11.5 Bits WORST SECOND OR THIRD HARMONIC fIN = 2.4 MHz 25°C −90 −90 −90 dBc fIN = 70 MHz 25°C −85 −85 −85 dBc Full −76 −73 −73 dBc fIN = 100 MHz 25°C −85 −85 −85 dBc fIN = 170 MHz 25°C −83.5 −83.5 −83 dBc SPURIOUS-FREE DYNAMIC RANGE (SFDR) fIN = 2.4 MHz 25°C 90 90 90 dBc fIN = 70 MHz 25°C 85 85 85 dBc Full 76 73 73 dBc fIN = 100 MHz 25°C 85 85 85 dBc fIN = 170 MHz 25°C 83.5 83.5 83 dBc WORST OTHER HARMONIC OR SPUR fIN = 2.4 MHz 25°C −90 −90 −90 dBc fIN = 70 MHz 25°C −90 −90 −90 dBc Full −85 −80 −80 dBc fIN = 100 MHz 25°C −90 −90 −90 dBc fIN = 170 MHz 25°C −90 −90 −90 dBc TWO-TONE SFDR fIN = 29 MHz (−7 dBFS), 32 MHz 25°C 87 87 85 dBc (−7 dBFS) fIN = 169 MHz (−7 dBFS), 172 MHz 25°C 83 83 84 dBc (−7 dBFS) ANALOG INPUT BANDWIDTH 25°C 650 650 650 MHz 1 See AN-835, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions. Rev. A | Page 5 of 44 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS EQUIVALENT CIRCUITS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ANALOG INPUT CONSIDERATIONS VOLTAGE REFERENCE CLOCK INPUT CONSIDERATIONS JITTER CONSIDERATIONS POWER DISSIPATION AND STANDBY MODE DIGITAL OUTPUTS TIMING SERIAL PORT INTERFACE (SPI) CONFIGURATION USING THE SPI HARDWARE INTERFACE CONFIGURATION WITHOUT THE SPI MEMORY MAP READING THE MEMORY MAP REGISTER TABLE MEMORY MAP REGISTER TABLE LAYOUT CONSIDERATIONS POWER AND GROUND RECOMMENDATIONS CML RBIAS REFERENCE DECOUPLING EVALUATION BOARD POWER SUPPLIES INPUT SIGNALS OUTPUT SIGNALS DEFAULT OPERATION AND JUMPER SELECTION SETTINGS ALTERNATIVE CLOCK CONFIGURATIONS ALTERNATIVE ANALOG INPUT DRIVE CONFIGURATION SCHEMATICS EVALUATION BOARD LAYOUTS BILL OF MATERIALS OUTLINE DIMENSIONS ORDERING GUIDE