Datasheet AD7991, AD7995, AD7999 (Analog Devices) - 10
| Hersteller | Analog Devices |
| Beschreibung | 4-Channel, 8-Bit ADC with I2C Compatible Interface in 8-Lead SOT-23 |
| Seiten / Seite | 28 / 10 — AD7991/AD7995/AD7999. Limit at tMIN, tMAX. Parameter Conditions. Min. Typ … |
| Revision | C |
| Dateiformat / Größe | PDF / 615 Kb |
| Dokumentensprache | Englisch |
AD7991/AD7995/AD7999. Limit at tMIN, tMAX. Parameter Conditions. Min. Typ Max Unit Description. t11. t12. SCL. t10. SDA
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AD7991/AD7995/AD7999 Limit at tMIN, tMAX Parameter Conditions Min Typ Max Unit Description
t10 Standard mode 300 ns tFDA, fall time of the SDA signal Fast mode 20 + 0.1 CB 300 ns High speed mode CB = 100 pF maximum 10 80 ns CB = 400 pF maximum 20 160 ns t11 Standard mode 1000 ns tRCL, rise time of the SCL signal Fast mode 20 + 0.1 CB 300 ns High speed mode CB = 100 pF maximum 10 40 ns CB = 400 pF maximum 20 80 ns t11A Standard mode 1000 ns tRCL1, rise time of the SCL signal after a repeated start condition and after an acknowledge bit Fast mode 20 + 0.1 CB 300 ns High speed mode CB = 100 pF maximum 10 80 ns CB = 400 pF maximum 20 160 ns t12 Standard mode 300 ns tFCL, fall time of the SCL signal Fast mode 20 + 0.1 CB 300 ns High speed mode CB = 100 pF maximum 10 40 ns CB = 400 pF maximum 20 80 ns t 1 SP Fast mode 0 50 ns Pulse width of the suppressed spike High speed mode 0 10 ns tPOWER-UP 0.6 μs Power-up and acquisition time 1 Functionality is tested during production. 2 A device must provide a data hold time for SDA in order to bridge the undefined region of the SCL falling edge. 3 For 3 V supplies, the maximum hold time with CB = 100 pF maximum is 100 ns maximum.
t11 t12 t2 t6 SCL t6 t4 t3 t5 t8 t1 t10 t9 SDA t7 S P S P S = START CONDITION P = STOP CONDITION
02 -0 61 64 0 Figure 2. 2-Wire Serial Interface Timing Diagram Rev. B | Page 10 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AD7991 AD7995 AD7999 I2C TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CONVERTER OPERATION ADC Transfer Function TYPICAL CONNECTION DIAGRAM ANALOG INPUT INTERNAL REGISTER STRUCTURE CONFIGURATION REGISTER SAMPLE DELAY AND BIT TRIAL DELAY CONVERSION RESULT REGISTER SERIAL INTERFACE SERIAL BUS ADDRESS WRITING TO THE AD7991/AD7995/AD7999 READING FROM THE AD7991/AD7995/AD7999 PLACING THE AD7991/AD7995/AD7999 INTO HIGH SPEED MODE MODE OF OPERATION OUTLINE DIMENSIONS ORDERING GUIDE
AD7991/AD7995/AD7999 Limit at tMIN, tMAX Parameter Conditions Min Typ Max Unit Description
t10 Standard mode 300 ns tFDA, fall time of the SDA signal Fast mode 20 + 0.1 CB 300 ns High speed mode CB = 100 pF maximum 10 80 ns CB = 400 pF maximum 20 160 ns t11 Standard mode 1000 ns tRCL, rise time of the SCL signal Fast mode 20 + 0.1 CB 300 ns High speed mode CB = 100 pF maximum 10 40 ns CB = 400 pF maximum 20 80 ns t11A Standard mode 1000 ns tRCL1, rise time of the SCL signal after a repeated start condition and after an acknowledge bit Fast mode 20 + 0.1 CB 300 ns High speed mode CB = 100 pF maximum 10 80 ns CB = 400 pF maximum 20 160 ns t12 Standard mode 300 ns tFCL, fall time of the SCL signal Fast mode 20 + 0.1 CB 300 ns High speed mode CB = 100 pF maximum 10 40 ns CB = 400 pF maximum 20 80 ns t 1 SP Fast mode 0 50 ns Pulse width of the suppressed spike High speed mode 0 10 ns tPOWER-UP 0.6 μs Power-up and acquisition time 1 Functionality is tested during production. 2 A device must provide a data hold time for SDA in order to bridge the undefined region of the SCL falling edge. 3 For 3 V supplies, the maximum hold time with CB = 100 pF maximum is 100 ns maximum.
t11 t12 t2 t6 SCL t6 t4 t3 t5 t8 t1 t10 t9 SDA t7 S P S P S = START CONDITION P = STOP CONDITION
02 -0 61 64 0 Figure 2. 2-Wire Serial Interface Timing Diagram Rev. B | Page 10 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AD7991 AD7995 AD7999 I2C TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CONVERTER OPERATION ADC Transfer Function TYPICAL CONNECTION DIAGRAM ANALOG INPUT INTERNAL REGISTER STRUCTURE CONFIGURATION REGISTER SAMPLE DELAY AND BIT TRIAL DELAY CONVERSION RESULT REGISTER SERIAL INTERFACE SERIAL BUS ADDRESS WRITING TO THE AD7991/AD7995/AD7999 READING FROM THE AD7991/AD7995/AD7999 PLACING THE AD7991/AD7995/AD7999 INTO HIGH SPEED MODE MODE OF OPERATION OUTLINE DIMENSIONS ORDERING GUIDE