Datasheet AD7264 (Analog Devices) - 3
| Hersteller | Analog Devices |
| Beschreibung | 1 MSPS, 14-Bit, Simultaneous Sampling SAR ADC with PGA and Four Comparators |
| Seiten / Seite | 30 / 3 — AD7264. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 5/2017—Rev. C to … |
| Revision | E |
| Dateiformat / Größe | PDF / 1.1 Mb |
| Dokumentensprache | Englisch |
AD7264. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 5/2017—Rev. C to Rev. D. 7/2008—Rev. 0 to Rev. A
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AD7264 Data Sheet TABLE OF CONTENTS
Features .. 1 Typical Connection Diagrams .. 17 General Description ... 1 Application Details ... 20 Functional Block Diagram .. 1 Modes of Operation ... 21 Product Highlights ... 1 Pin Driven Mode .. 21 Revision History ... 2 Gain Selection ... 21 Specifications ... 3 Power-Down Modes .. 21 Timing Specifications .. 6 Control Register ... 22 Absolute Maximum Ratings .. 7 On-Chip Registers .. 23 ESD Caution .. 7 Serial Interface .. 24 Pin Configurations and Function Descriptions ... 8 Calibration ... 26 Typical Performance Characteristics ... 10 Internal Offset Calibration .. 26 Terminology .. 14 Adjusting the Offset Calibration Register ... 27 Theory of Operation .. 15 System Gain Calibration.. 27 Circuit Information .. 15 Applications Information .. 28 Comparators .. 15 Grounding and Layout .. 28 Operation ... 15 PCB Design Guidelines for LFCSP .. 28 Analog Inputs .. 15 Outline Dimensions ... 29 VDRIVE .. 16 Ordering Guide .. 29 Reference ... 16
REVISION HISTORY 5/2017—Rev. C to Rev. D 7/2008—Rev. 0 to Rev. A
Changed CP-48-1 to CP-48-4 .. Throughout Added AD7264-5.. Universal Changes to Figure 4 .. 8 Added LQFP Package .. Universal Updated Outline Dimensions ... 29 Changes to Figure 1 ... 1 Changes to Ordering Guide .. 29 Changes to Common-Mode Voltage Range, VCM Parameter ... 3 Changes to Table 3 ... 7
12/2015—Rev. B to Rev. C
Changes to Pin Configuration and Function Changes to Table 1 .. 3 Description Section ... 8 Changes to Figure 28 .. 20 Changes to Figure 29 .. 19 Updated Outline Dimensions ... 28
11/2012—Rev. A to Rev. B
Changes to Ordering Guide .. 29 Changes to Digital Input Voltage to DGND Parameter, Table 3 7 Updated Outline Dimensions ... 28
5/2008—Revision 0: Initial Version
Rev. D | Page 2 of 29 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION COMPARATORS OPERATION ANALOG INPUTS Transfer Function VDRIVE REFERENCE TYPICAL CONNECTION DIAGRAMS Comparator Application Details APPLICATION DETAILS MODES OF OPERATION PIN DRIVEN MODE GAIN SELECTION POWER-DOWN MODES Power-Up Conditions CONTROL REGISTER ON-CHIP REGISTERS Writing to a Register Reading from a Register SERIAL INTERFACE CALIBRATION INTERNAL OFFSET CALIBRATION ADJUSTING THE OFFSET CALIBRATION REGISTER SYSTEM GAIN CALIBRATION APPLICATIONS INFORMATION GROUNDING AND LAYOUT PCB DESIGN GUIDELINES FOR LFCSP OUTLINE DIMENSIONS ORDERING GUIDE
AD7264 Data Sheet TABLE OF CONTENTS
Features .. 1 Typical Connection Diagrams .. 17 General Description ... 1 Application Details ... 20 Functional Block Diagram .. 1 Modes of Operation ... 21 Product Highlights ... 1 Pin Driven Mode .. 21 Revision History ... 2 Gain Selection ... 21 Specifications ... 3 Power-Down Modes .. 21 Timing Specifications .. 6 Control Register ... 22 Absolute Maximum Ratings .. 7 On-Chip Registers .. 23 ESD Caution .. 7 Serial Interface .. 24 Pin Configurations and Function Descriptions ... 8 Calibration ... 26 Typical Performance Characteristics ... 10 Internal Offset Calibration .. 26 Terminology .. 14 Adjusting the Offset Calibration Register ... 27 Theory of Operation .. 15 System Gain Calibration.. 27 Circuit Information .. 15 Applications Information .. 28 Comparators .. 15 Grounding and Layout .. 28 Operation ... 15 PCB Design Guidelines for LFCSP .. 28 Analog Inputs .. 15 Outline Dimensions ... 29 VDRIVE .. 16 Ordering Guide .. 29 Reference ... 16
REVISION HISTORY 5/2017—Rev. C to Rev. D 7/2008—Rev. 0 to Rev. A
Changed CP-48-1 to CP-48-4 .. Throughout Added AD7264-5.. Universal Changes to Figure 4 .. 8 Added LQFP Package .. Universal Updated Outline Dimensions ... 29 Changes to Figure 1 ... 1 Changes to Ordering Guide .. 29 Changes to Common-Mode Voltage Range, VCM Parameter ... 3 Changes to Table 3 ... 7
12/2015—Rev. B to Rev. C
Changes to Pin Configuration and Function Changes to Table 1 .. 3 Description Section ... 8 Changes to Figure 28 .. 20 Changes to Figure 29 .. 19 Updated Outline Dimensions ... 28
11/2012—Rev. A to Rev. B
Changes to Ordering Guide .. 29 Changes to Digital Input Voltage to DGND Parameter, Table 3 7 Updated Outline Dimensions ... 28
5/2008—Revision 0: Initial Version
Rev. D | Page 2 of 29 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION COMPARATORS OPERATION ANALOG INPUTS Transfer Function VDRIVE REFERENCE TYPICAL CONNECTION DIAGRAMS Comparator Application Details APPLICATION DETAILS MODES OF OPERATION PIN DRIVEN MODE GAIN SELECTION POWER-DOWN MODES Power-Up Conditions CONTROL REGISTER ON-CHIP REGISTERS Writing to a Register Reading from a Register SERIAL INTERFACE CALIBRATION INTERNAL OFFSET CALIBRATION ADJUSTING THE OFFSET CALIBRATION REGISTER SYSTEM GAIN CALIBRATION APPLICATIONS INFORMATION GROUNDING AND LAYOUT PCB DESIGN GUIDELINES FOR LFCSP OUTLINE DIMENSIONS ORDERING GUIDE