Datasheet AD7682, AD7689 (Analog Devices) - 5

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Data Sheet AD7682/AD7689 Test Conditions/ AD7689A AD7682B/ AD7689B Parameter Comments Min Typ Max Min Typ Max Unit
WLFCSP fIN = 20 kHz, VREF = 5 V 91 92 dB fIN = 20 kHz, VREF = 4.096 V, 89.5 91 dB internal REF fIN = 20 kHz, VREF = 2.5 V, 86 87.5 dB internal REF SINAD LFCSP fIN = 20 kHz, VREF = 5 V 89 91 92.5 dB fIN = 20 kHz, VREF = 5 V, 30.5 33.5 dB −60 dB input fIN = 20 kHz, VREF = 4.096 V 88 90 91 dB internal REF fIN = 20 kHz, VREF = 2.5 V 86 87 88.4 dB internal REF WLFCSP fIN = 20 kHz, VREF = 5 V 89.5 91 dB fIN = 20 kHz, VREF = 5 V, 32 dB −60 dB input fIN = 20 kHz, VREF = 4.096 V 88.5 89.5 dB internal REF fIN = 20 kHz, VREF = 2.5 V 85.5 87 dB internal REF Total Harmonic fIN = 20 kHz −97 −100 dB Distortion (THD) Spurious-Free Dynamic fIN = 20 kHz 105 110 dB Range Channel-to-Channel fIN = 100 kHz on −120 −125 dB Crosstalk adjacent channel(s) SAMPLING DYNAMICS −3 dB Input Bandwidth Full bandwidth 1.7 1.7 MHz ¼ bandwidth 0.425 0.425 MHz Aperture Delay VDD = 5 V 2.5 2.5 ns 1 See the Analog Inputs section. 2 The bandwidth is set in the configuration register. 3 LSB means least significant bit. With the 5 V input range, one LSB is 76.3 µV. 4 See the Terminology section. These specifications include full temperature range variation but not the error contribution from the external reference. 5 With VDD = 5 V, unless otherwise noted. 6 All specifications expressed in decibels are referred to a full-scale input FSR and tested with an input signal at 0.5 dB below ful scale, unless otherwise specified. Rev. H | Page 5 of 35 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Timing Specifications Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Overview Converter Operation Transfer Functions Typical Connection Diagrams Unipolar or Bipolar Bipolar Single Supply Analog Inputs Input Structure Selectable Low-Pass Filter Input Configurations Sequencer Source Resistance Driver Amplifier Choice Voltage Reference Output/Input Internal Reference/Temperature Sensor External Reference and Internal Buffer External Reference Reference Decoupling Power Supply Supplying the ADC from the Reference Digital Interface Reading/Writing During Conversion, Fast Hosts Reading/Writing After Conversion, Any Speed Hosts Reading/Writing Spanning Conversion, Any Speed Host Configuration Register, CFG General Timing Without a Busy Indicator General Timing with a Busy Indicator Channel Sequencer Examples Read/Write Spanning Conversion Without a Busy Indicator Read/Write Spanning Conversion with a Busy Indicator Applications Information Layout Evaluating the AD7682/AD7689 Performance Outline Dimensions Ordering Guide