Datasheet AD9239 (Analog Devices)

Quad, 12-Bit, 170 MSPS/210 MSPS/250 MSPS Serial Output 1.8 V ADC Data Sheet AD9239 FEATURES FUNCTIONAL BLOCK DIAGRAM 4 ADCs in 1 package AVDD PDWN DRVDD DRGND Coded serial digital outputs with ECC per channel AD9239 On-chip temperature sensor −95 dB channel-to-channel crosstalk VIN + A DOUT + A PIPELINE BUF SHA 12 CHANNEL A ADC VIN – A DOUT – A SNR = 65 dBFS with AIN = 85 MHz at 250 MSPS AND VCM A R, SFDR = 77 dBc with AIN = 85 MHz at 250 MSPS VIN + B DE DOUT + B Excellent linearity PIPELINE BUF SHA 12 CHANNEL B ADC RS VIN – B NCO E DOUT – B DNL = ±0.3 LSB (typical) E V VCM B R, E INL = ±0.7 LSB (typical) DRI IZ L VIN + C DOUT + C PIPELINE 780 MHz full power analog bandwidth BUF SHA 12 AL CM CHANNEL C ADC VIN – C RI DOUT – C E Power dissipation = 380 mW per channel at 250 MSPS VCM C A S 1.25 V p-p input voltage range, adjustable up to 1.5 V p-p VIN + D DOUT + D PIPELINE DAT BUF SHA 12 CHANNEL D 1.8 V supply operation ADC VIN – D DOUT – D Clock duty cycle stabilizer VCM D PGM3 Serial port interface features REFERENCE PGM2 RBIAS Power-down modes DATA RATE MULTIPLIER PGM1 Digital test pattern enable TEMPOUT SERIAL PGM0 Programmable header PORT RESET Programmable pin functions (PGMx, PDWN)
001
SCLK SDI/ SDO CSB CLK+ CLK– APPLICATIONS SDIO
06980- Figure 1.
Communication receivers Cable head end equipment/M-CMTS Broadband radios Wireless infrastructure transceivers Radar/military-aerospace subsystems Test equipment GENERAL DESCRIPTION
The AD9239 is a quad, 12-bit, 250 MSPS analog-to-digital Fabricated on an advanced CMOS process, the AD9239 is avail- converter (ADC) with an on-chip temperature sensor and a able in a Pb-free/RoHS-compliant, 72-lead LFCSP package. It is high speed serial interface. It is designed to support digitizing specified over the industrial temperature range of −40°C to +85°C. high frequency, wide dynamic range signals with an input
PRODUCT HIGHLIGHTS
bandwidth up to 780 MHz. The output data are serialized and presented in packet format, consisting of channel-specific 1. Four ADCs are contained in a small, space-saving package. information, coded samples, and error correction code. 2. An on-chip PLL allows users to provide a single ADC sampling clock, and the PLL distributes and multiplies up The ADC requires a single 1.8 V power supply and the input to produce the corresponding data rate clock. clock may be driven differentially with a sine wave, LVPECL, 3. Coded data rate supports up to 4.0 Gbps per channel. TTL, or LVDS. A clock duty cycle stabilizer allows high Coding includes scrambling to ensure proper dc common performance at ful speed with a wide range of clock duty mode, embedded clock, and error correction. cycles. The on-chip reference eliminates the need for external 4. The AD9239 operates from a single 1.8 V power supply. decoupling and can be adjusted by means of SPI control. 5. Flexible synchronization schemes and programmable Various power-down and standby modes are supported. The mode pins. ADC typically consumes 145 mW per channel with the digital 6. On-chip temperature sensor. link stil in operation when standby operation is enabled.
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Document Outline Features Applications Functional Block Diagram General Description Product Highlights Table of Contents Revision History Specifications AC Specifications Digital Specifications Switching Specifications Timing Diagram Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Description Typical Performance Characteristics Equivalent Circuits Theory of Operation Analog Input Considerations Differential Input Configurations Single-Ended Input Configuration Clock Input Considerations Clock Duty Cycle Considerations Clock Jitter Considerations Power Dissipation Digital Start-Up Sequence Minimize Skew and Time Misalignment (Optional) Link Initialization (Required) Digital Outputs and Timing Digital Output Scrambler and Error Code Correction Error Correction Code Scramblers Inverter Balance Example Calculating the Parity Bits for the Hamming Code TEMPOUT Pin RBIAS Pin VCMx Pins RESET Pin PDWN Pin SDO Pin SDI/SDIO Pin SCLK Pin CSB Pin PGMx Pins Serial Port Interface (SPI) Hardware Interface Memory Map Reading the Memory Map Table Reserved Locations Default Values Logic Levels Power and Ground Recommendations Exposed Paddle Thermal Heat Slug Recommendations Outline Dimensions Ordering Guide