Datasheet AD7193 (Analog Devices) - 6
Hersteller | Analog Devices |
Beschreibung | 4-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA |
Seiten / Seite | 57 / 6 — Data Sheet. AD7193. Parameter. Min. Typ. Max. Unit. Test … |
Revision | E |
Dateiformat / Größe | PDF / 1.1 Mb |
Dokumentensprache | Englisch |
Data Sheet. AD7193. Parameter. Min. Typ. Max. Unit. Test Conditions/Comments1
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Data Sheet AD7193 Parameter Min Typ Max Unit Test Conditions/Comments1
Normal-Mode Rejection2 Sinc4 Filter Internal Clock @ 50 Hz, 60 Hz 100 dB 10 Hz output data rate, 50 Hz ± 1 Hz, 60 Hz ± 1 Hz 74 dB 50 Hz output data rate, REJ606 = 1, 50 Hz ± 1 Hz, 60 Hz ± 1 Hz @ 50 Hz 96 dB 50 Hz output data rate, 50 Hz ± 1 Hz @ 60 Hz 97 dB 60 Hz output data rate, 60 Hz ± 1 Hz External Clock @ 50 Hz, 60 Hz 120 dB 10 Hz output data rate, 50 Hz ± 1 Hz, 60 Hz ± 1 Hz 82 dB 50 Hz output data rate, REJ606 = 1, 50 Hz ± 1 Hz, 60 Hz ± 1 Hz @ 50 Hz 120 dB 50 Hz output data rate, 50 Hz ± 1 Hz @ 60 Hz 120 dB 60 Hz output data rate, 60 Hz ± 1 Hz Sinc3 Filter Internal Clock @ 50 Hz, 60 Hz 75 dB 10 Hz output data rate, 50 Hz ± 1 Hz, 60 Hz ± 1 Hz 60 dB 50 Hz output data rate, REJ606 = 1, 50 Hz ± 1 Hz, 60 Hz ± 1 Hz @ 50 Hz 70 dB 50 Hz output data rate, 50 Hz ± 1 Hz @ 60 Hz 70 dB 60 Hz output data rate, 60 Hz ± 1 Hz External Clock @ 50 Hz, 60 Hz 100 dB 10 Hz output data rate, 50 Hz ± 1 Hz, 60 Hz ± 1 Hz @ 50 Hz 67 dB 50 Hz output data rate, REJ606 = 1, 50 Hz ± 1 Hz, 60 Hz ± 1 Hz @ 50 Hz 95 dB 50 Hz output data rate, 50 Hz ± 1 Hz @ 60 Hz 95 dB 60 Hz output data rate, 60 Hz ± 1 Hz Fast Settling Internal Clock @ 50 Hz 26 dB FS[9:0]3 = 6, average by 16, 50 Hz ± 0.5 Hz @ 60 Hz 26 dB FS[9:0]3 = 5, average by 16, 60 Hz ± 0.5 Hz External Clock @ 50 Hz 40 dB FS[9:0]3 = 6, average by 16, 50 Hz ± 0.5 Hz @ 60 Hz 40 dB FS[9:0]3 = 5, average by 16, 60 Hz ± 0.5 Hz ANALOG INPUTS Differential Input ±VREF/gain V VREF = REFINx(+) − REFINx(−), gain = 1 to 128 Voltage Ranges −(AVDD − 1.25 V)/gain +(AVDD − 1.25 V)/gain V Gain > 1 Absolute AIN Voltage Limits2 Unbuffered Mode AGND − 0.05 AVDD + 0.05 V Buffered Mode AGND + 0.25 AVDD − 0.25 V Analog Input Current Buffered Mode Input Current2 −2 +2 nA Gain = 1 −3 +3 nA Gain > 1 Input Current Drift ±5 pA/°C Unbuffered Mode Input Current ±3.5 µA/V Gain = 1, input current varies with input voltage ±1 µA/V Gain > 1 Input Current Drift ±0.05 nA/V/°C External clock ±1.6 nA/V/°C Internal clock Rev. E | Page 5 of 56 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS Circuit and Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS RMS NOISE AND RESOLUTION SINC4 CHOP DISABLED SINC3 CHOP DISABLED FAST SETTLING ON-CHIP REGISTERS COMMUNICATIONS REGISTER RS2, RS1, RS0 = 000 STATUS REGISTER RS2, RS1, RS0 = 000; Power-On/Reset = 0x80 MODE REGISTER RS2, RS1, RS0 = 001; Power-On/Reset = 0x080060 CONFIGURATION REGISTER RS2, RS1, RS0 = 010; Power-On/Reset = 0x000117 DATA REGISTER RS2, RS1, RS0 = 011; Power-On/Reset = 0x000000 ID REGISTER RS2, RS1, RS0 = 100; Power-On/Reset = 0xX2 GPOCON REGISTER RS2, RS1, RS0 = 101; Power-On/Reset = 0x00 OFFSET REGISTER RS2, RS1, RS0 = 110; Power-On/Reset = 0x800000) FULL-SCALE REGISTER RS2, RS1, RS0 = 111; Power-On/Reset = 0x5XXXX0 ADC CIRCUIT INFORMATION OVERVIEW Analog Inputs Multiplexer PGA Reference Detect Burnout Currents Sigma-Delta (Σ-Δ) ADC and Filter Serial Interface Clock Bridge Power-Down Switch Temperature Sensor Digital Outputs Calibration ANALOG INPUT CHANNEL PROGRAMMABLE GAIN ARRAY (PGA) REFERENCE REFERENCE DETECT BIPOLAR/UNIPOLAR CONFIGURATION DATA OUTPUT CODING BURNOUT CURRENTS CHANNEL SEQUENCER DIGITAL INTERFACE Single Conversion Mode Continuous Conversion Mode Continuous Read RESET SYSTEM SYNCHRONIZATION ENABLE PARITY CLOCK BRIDGE POWER-DOWN SWITCH TEMPERATURE SENSOR LOGIC OUTPUTS CALIBRATION DIGITAL FILTER SINC4 FILTER (CHOP DISABLED) Sinc4 Output Data Rate/Settling Time Sinc4 Zero Latency Sinc4 50 Hz/60 Hz Rejection SINC3 FILTER (CHOP DISABLED) Sinc3 Output Data Rate and Settling Time Sinc3 Zero Latency Sinc3 50 Hz/60 Hz Rejection CHOP ENABLED (SINC4 FILTER) Output Data Rate and Settling Time (Sinc4 Chop Enabled) 50 Hz/60 Hz Rejection (Sinc4 Chop Enabled) CHOP ENABLED (SINC3 FILTER) Output Data Rate and Settling Time (Sinc3 Chop Enabled) 50 Hz/60 Hz Rejection (Sinc3 Chop Enabled) FAST SETTLING MODE (SINC4 FILTER) Output Data Rate and Settling Time, Sinc4 Filter 50 Hz/60 Hz Rejection, Sinc4 Filter FAST SETTLING MODE (SINC3 FILTER) Output Data Rate and Settling Time, Sinc3 Filter 50 Hz/60 Hz Rejection, Sinc3 Filter FAST SETTLING MODE (CHOP ENABLED) SUMMARY OF FILTER OPTIONS GROUNDING AND LAYOUT APPLICATIONS INFORMATION FLOWMETER OUTLINE DIMENSIONS ORDERING GUIDE