Datasheet AD7193 (Analog Devices) - 2

HerstellerAnalog Devices
Beschreibung4-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA
Seiten / Seite57 / 2 — AD7193* PRODUCT PAGE QUICK LINKS Last Content Update: 08/02/2017. …
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DokumentenspracheEnglisch

AD7193* PRODUCT PAGE QUICK LINKS Last Content Update: 08/02/2017. COMPARABLE PARTS. REFERENCE DESIGNS. EVALUATION KITS

AD7193* PRODUCT PAGE QUICK LINKS Last Content Update: 08/02/2017 COMPARABLE PARTS REFERENCE DESIGNS EVALUATION KITS

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AD7193* PRODUCT PAGE QUICK LINKS Last Content Update: 08/02/2017 COMPARABLE PARTS REFERENCE DESIGNS
View a parametric search of comparable parts. • CN0209 • CN0287
EVALUATION KITS
• AD7193 Evaluation Board
REFERENCE MATERIALS Technical Articles DOCUMENTATION
• High-resolution ADCs — an overview
Application Notes Tutorials
• AN-1069: Zero Latency for the AD7190, AD7192, AD7193, • Tutorial on Technical and Performance Benefits of AD719x AD7194, and AD7195 Family • AN-1084: Channel Switching: AD7190, AD7192, AD7193, AD7194, AD7195
DESIGN RESOURCES
• AN-1131: Chopping on the AD7190, AD7192, AD7193, • AD7193 Material Declaration AD7194, and AD7195 • PCN-PDN Information
Data Sheet
• Quality And Reliability • AD7193: 4-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma- Delta ADC with PGA Data Sheet • Symbols and Footprints
User Guides DISCUSSIONS
• UG-223: Evaluation Board for the AD7193, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta (Σ-Δ) ADC View all AD7193 EngineerZone Discussions.
SOFTWARE AND SYSTEMS REQUIREMENTS SAMPLE AND BUY
• AD7193 - No-OS Driver for Microchip Microcontroller Visit the product page to see pricing options. Platforms • AD7193 - No-OS Driver for Renesas Microcontroller
TECHNICAL SUPPORT
Platforms Submit a technical question or find your regional support • AD7193 Pmod Xilinx FPGA Reference Design number. • BeMicro FPGA Project for CN0209 with Nios driver • CN0209 FMC-SDP Interposer & Evaluation Board / Xilinx
DOCUMENT FEEDBACK
KC705 Reference Design Submit feedback for this data sheet.
TOOLS AND SIMULATIONS
• AD7193/AD7194 Digital Filter Models • Download the Active Functional Model to evaluate and debug AD719x
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Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS Circuit and Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS RMS NOISE AND RESOLUTION SINC4 CHOP DISABLED SINC3 CHOP DISABLED FAST SETTLING ON-CHIP REGISTERS COMMUNICATIONS REGISTER RS2, RS1, RS0 = 000 STATUS REGISTER RS2, RS1, RS0 = 000; Power-On/Reset = 0x80 MODE REGISTER RS2, RS1, RS0 = 001; Power-On/Reset = 0x080060 CONFIGURATION REGISTER RS2, RS1, RS0 = 010; Power-On/Reset = 0x000117 DATA REGISTER RS2, RS1, RS0 = 011; Power-On/Reset = 0x000000 ID REGISTER RS2, RS1, RS0 = 100; Power-On/Reset = 0xX2 GPOCON REGISTER RS2, RS1, RS0 = 101; Power-On/Reset = 0x00 OFFSET REGISTER RS2, RS1, RS0 = 110; Power-On/Reset = 0x800000) FULL-SCALE REGISTER RS2, RS1, RS0 = 111; Power-On/Reset = 0x5XXXX0 ADC CIRCUIT INFORMATION OVERVIEW Analog Inputs Multiplexer PGA Reference Detect Burnout Currents Sigma-Delta (Σ-Δ) ADC and Filter Serial Interface Clock Bridge Power-Down Switch Temperature Sensor Digital Outputs Calibration ANALOG INPUT CHANNEL PROGRAMMABLE GAIN ARRAY (PGA) REFERENCE REFERENCE DETECT BIPOLAR/UNIPOLAR CONFIGURATION DATA OUTPUT CODING BURNOUT CURRENTS CHANNEL SEQUENCER DIGITAL INTERFACE Single Conversion Mode Continuous Conversion Mode Continuous Read RESET SYSTEM SYNCHRONIZATION ENABLE PARITY CLOCK BRIDGE POWER-DOWN SWITCH TEMPERATURE SENSOR LOGIC OUTPUTS CALIBRATION DIGITAL FILTER SINC4 FILTER (CHOP DISABLED) Sinc4 Output Data Rate/Settling Time Sinc4 Zero Latency Sinc4 50 Hz/60 Hz Rejection SINC3 FILTER (CHOP DISABLED) Sinc3 Output Data Rate and Settling Time Sinc3 Zero Latency Sinc3 50 Hz/60 Hz Rejection CHOP ENABLED (SINC4 FILTER) Output Data Rate and Settling Time (Sinc4 Chop Enabled) 50 Hz/60 Hz Rejection (Sinc4 Chop Enabled) CHOP ENABLED (SINC3 FILTER) Output Data Rate and Settling Time (Sinc3 Chop Enabled) 50 Hz/60 Hz Rejection (Sinc3 Chop Enabled) FAST SETTLING MODE (SINC4 FILTER) Output Data Rate and Settling Time, Sinc4 Filter 50 Hz/60 Hz Rejection, Sinc4 Filter FAST SETTLING MODE (SINC3 FILTER) Output Data Rate and Settling Time, Sinc3 Filter 50 Hz/60 Hz Rejection, Sinc3 Filter FAST SETTLING MODE (CHOP ENABLED) SUMMARY OF FILTER OPTIONS GROUNDING AND LAYOUT APPLICATIONS INFORMATION FLOWMETER OUTLINE DIMENSIONS ORDERING GUIDE