Datasheet AD7607 (Analog Devices)

8-Channel DAS with 14-Bit, Bipolar Input, Simultaneous Sampling ADC Data Sheet AD7607 FEATURES APPLICATIONS 8 simultaneously sampled inputs Power-line monitoring and protection systems True bipolar analog input ranges: ±10 V, ±5 V Multiphase motor control Single 5 V analog supply and 2.3 V to 5.25 V VDRIVE Instrumentation and control systems Fully integrated data acquisition solution Multiaxis positioning systems Analog input clamp protection Data acquisition systems (DAS) Input buffer with 1 MΩ analog input impedance Second-order antialiasing analog filter Table 1. High Resolution, Bipolar Input, Simultaneous On-chip accurate reference and reference buffer Sampling DAS Solutions 14-bit ADC with 200 kSPS on all channels Single-Ended Number of Simultaneous Flexible parallel/serial interface Resolution Inputs Sampling Channels SPI/QSPI™/MICROWIRE™/DSP compatible
18 Bits AD7608 8
Pin-compatible solutions from 14 bits to 18 bits
16 Bits AD7606 8
Performance
AD7606-6 6
7 kV ESD rating on analog input channels
AD7606-4 4
Fast throughput rate: 200 kSPS for all channels
14 Bits AD7607 8
85.5 dB SNR at 50 kSPS INL ±0.25 LSB, DNL ±0.25 LSB Low power: 100 mW at 200 kSPS Standby mode: 25 mW typical 64-lead LQFP package FUNCTIONAL BLOCK DIAGRAM AV AV CC CC REGCAP REGCAP REFCAPB REFCAPA 1MΩ RFB V1 CLAMP SECOND- T/H V1GND CLAMP 1MΩ R ORDER LPF 2.5V 2.5V FB LDO LDO 1MΩ RFB REFIN/REFOUT V2 CLAMP SECOND- T/H V2GND CLAMP 1MΩ R ORDER LPF FB REF SELECT 2.5V REF 1MΩ R AGND FB V3 CLAMP SECOND- T/H OS 2 V3GND CLAMP 1MΩ R ORDER LPF FB OS 1 1MΩ OS 0 RFB V4 CLAMP SECOND- T/H D V4GND CLAMP OUTA 1MΩ R ORDER LPF SERIAL FB DOUTB 8:1 1MΩ R MUX PARALLEL/ FB RD/SCLK 14-BIT DIGITAL V5 CLAMP SERIAL SAR FILTER INTERFACE CS SECOND- T/H V5GND CLAMP 1MΩ R ORDER LPF FB PAR/SER/BYTE SEL 1MΩ R V FB DRIVE V6 CLAMP SECOND- T/H V6GND CLAMP PARALLEL DB[15:0] 1MΩ R ORDER LPF FB 1MΩ R AD7607 FB V7 CLAMP SECOND- T/H V7GND CLAMP 1MΩ R ORDER LPF CLK OSC FB 1MΩ RFB V8 BUSY CLAMP CONTROL SECOND- T/H INPUTS FRSTDATA V8GND CLAMP 1MΩ R ORDER LPF FB
001
AGND CONVST A CONVST B RESET RANGE
08096- Figure 1.
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Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY GENERAL DESCRIPTION SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CONVERTER DETAILS ANALOG INPUT Analog Input Ranges Analog Input Impedance Analog Input Clamp Protection Analog Input Antialiasing Filter Track-and-Hold Amplifiers ADC TRANSFER FUNCTION INTERNAL/EXTERNAL REFERENCE External Reference Mode Internal Reference Mode TYPICAL CONNECTION DIAGRAM POWER-DOWN MODES CONVERSION CONTROL Simultaneous Sampling on All Analog Input Channels Simultaneously Sampling Two Sets of Channels DIGITAL INTERFACE PARALLEL INTERFACE (/SER/BYTE SEL = 0) PARALLEL BYTE INTERFACE (/SER/BYTE SEL = 1, DB15 = 1) SERIAL INTERFACE (/SER/BYTE SEL = 1) READING DURING CONVERSION DIGITAL FILTER LAYOUT GUIDELINES OUTLINE DIMENSIONS ORDERING GUIDE NOTES